Finding critical paths in a flip-flop

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Dear scholars and researchers
I dealt with an issue in optimizing a logical gate through finding optimal aspect ratio (for example Flip-Flop) in sub-threshold region. How do I find critical paths in a flip-flop?
Best regards,
 

Hi,
Critical path is the path that has most delay in it in other words if you want create clock signal for your circuit you should wait equal to delay of critical path.for finding that you can find a way with most gates and FF.
 
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