djnik1362
Full Member level 2
Hi
I'm working with an AM receiver project which in electronic parts I must accomplish this job :
Sampling of an IF signal centered at 140MHz with 1MHz bandwidth.
Rejection of adjacent channels must be 80dB (Signals Centered at 139MHz and 141MHz must attenuate 80dB).
I need a solution .
All processing could be done with FPGA.
Thanks for your support.
I'm working with an AM receiver project which in electronic parts I must accomplish this job :
Sampling of an IF signal centered at 140MHz with 1MHz bandwidth.
Rejection of adjacent channels must be 80dB (Signals Centered at 139MHz and 141MHz must attenuate 80dB).
I need a solution .
All processing could be done with FPGA.
Thanks for your support.