FIFO Basics and Design

Can anyone help find material for FIFO basics and design in verilog ?
I am looking for some basic concepts of FIFO and its design.

I am new to designs with Clock Domain Crossing and wanted to understand the implementation of FIFO in this context.

The basics of FIFO are pretty simple with respect to implementation in verilog is concerned. The problem comes in the actual implementation of floorplanning and timing closure.
a) Problem 1 : The clock skew between the various flops that you will be using in your design. The main goal is balance the skew between the various flops. If you have multi-bit flops in you library then it will be easier.
b) Problem 2 : Clock power : As the cells will be located very close by there will be a lot of clock activity so IR drop is an important consideration.
c) CDC: clock domain crossing : This will depend on the clock frequencies which will dealing with. the most important aspect will be to use synchronizer cells.

also cycle to cycle timing as to analyzed if you are at higher speeds.

nandithaa_m said:

Can anyone help find material for FIFO basics and design in verilog ?
I am looking for some basic concepts of FIFO and its design.

I am new to designs with Clock Domain Crossing and wanted to understand the implementation of FIFO in this context.

Click to expand...

nandithaa_m said:

Can anyone help find material for FIFO basics and design in verilog ?
I am looking for some basic concepts of FIFO and its design.

I am new to designs with Clock Domain Crossing and wanted to understand the implementation of FIFO in this context.

Click to expand...

pl check this one site : https://www.asic-world.com/tidbits/fifo_depth.html
Also the verilog code : 1) https://www.asic-world.com/examples/verilog/syn_fifo.html
2) https://www.asic-world.com/examples/verilog/asyn_fifo.html
In this link you get the details of FIFO.

Please refer to these links.
http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO2.pdf
http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO1.pdf