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Hi.
I want to pass a signal from a fast clock domain to slow clock domain but the timing analysis fails.
I need no timing analysis for this path.
How can I disable Timing analysis for these signals?
Or how can disable Timing analysis for these domains?
I'm using ISE 14.3.
I want to pass a signal from a fast clock domain to slow clock domain but the timing analysis fails.
I need no timing analysis for this path.
How can I disable Timing analysis for these signals?
Or how can disable Timing analysis for these domains?
I'm using ISE 14.3.