When the gate voltage is greater than the turn-on threshold, the MOSFET is turned on; when the gate voltage is lower than the turn-on threshold, the MOSFET is turned off.
In actual applications, due to the influence of other factors such as device and peripheral circuit parasitic parameters, the originally turned-off power device may be mistakenly turned on.
Today, let's talk about the mistaken turn-on of MOSFET in the drive circuit and its countermeasures.
Let's talk about two cases of mistaken turn-on: mistaken turn-on caused by Miller effect and mistaken turn-on caused by parasitic inductance.
False turn-on caused by Miller effect
When the MOSFET is turned off and then turned on, the Vds voltage (the maximum voltage that can be applied between the drain and the source) rises rapidly to produce a high dv/dt (the rate of change of the drain-source voltage during the switching transient), thereby generating a displacement current (igd) in the capacitor Cgd (Miller capacitor).
This displacement current will generate a voltage spike after flowing through . If this voltage spike exceeds the turn-on threshold of the MOSFET, the MOSFET will be turned on, causing the circuit to be turned on or even damaged.
Another type of false turn-on is caused by parasitic inductance on the line. As shown in the figure below, Ls is the parasitic inductance on the source of the MOSFET.
When the MOSFET is turned off quickly, the current decreases rapidly to produce a high di/dt, and then a negative voltage (VLS) is generated across the two ends of the parasitic inductance. If this VLS voltage exceeds the gate threshold of the MOSFET, the MOSFET will be turned on by mistake.
So, what methods do we have to deal with the phenomenon of MOSFET being turned on by mistake?
1. Adjust the gate drive resistor and capacitor
The turn-on/off speed of the MOSFET can be adjusted by adjusting the size of the gate drive resistor and capacitor: increase the gate drive resistor and capacitor to slow down the turn-on/off speed of the MOSFET, reduce dv/dt (di/dt) and thus reduce the gate voltage spike.
2. Add a transistor
A transistor can be placed near the gate of the power tube to prevent false opening during the shutdown period, effectively suppressing the false gate opening caused by the Miller effect.
3. Use an anti-parallel diode
The current in the inductor can disappear through the diode loop, thereby avoiding the generation of reverse potential.