OK so correct me if I'm wrong. Looking at the waveform of FvM and the picture of TAP FSM I can tell that JTAG stays in reset state for the first six 1s of TMS, then goes to idle for one clock cycle, then "select DR scan", "capture DR", "shift DR" and from there it remains in that state. During shift, TCK increases in frequency and also the system does a bunch of shift bit runs, each separated by a small pause from the following one.. maybe to let the system process the received data from the TDO shift out line? So I have read some documentation and I know that the serial input can be sent to different registers. They are grouped in Data and Instruction. The two flows in the fsm state diagram are the same just split in DR and IR. But now I'm a little confused. At this point I expect that JTAG would actually first run a small IR scan to put a specific instruction in the instruction register, so that the following DR scan would use the content of this register to redirect the input and output line to the IDentification registers, because I have read that even among DR type scans there are different possible choices of register, but in the waveform the JTAG seems to go directly for the DR scan.. Maybe in this case ID register is considered as default and there is no need to specify it through the IR? Thanks