failed to find sdf file in vsim

[abu9022]

hi Friends,

I need a urgent help from you
i have the error in vsim

vsim -sdf -3196 failed to find SDF file "/tbench/tb_msp/p0"
tb_msp= name of tbench file
p0=instantiate
tbench= folder name for testbench

 

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I'm just going to make a guess as you didn't show the actual command line you used and the complete error text.

If that is the directory it's trying to look for the sdf file then you've got it pointing to your p0 instance and not a directory name. If that is what you have as the module that you are trying to annotate then you specified what you want to annotate for where the sdf is located.

Next time post the cut-n-pasted command line and error.


Regards

 

[abu9022]

command:

vsim -sdfmin /home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/tbench/tb_msp/mspram0 = /home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/iusyn_gates.sdf

# vsim -sdfmin /home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/tbench/tb_msp/mspram0 =
# ** Error: (vsim-SDF-3196) Failed to find SDF file "/home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/tbench/tb_msp/mspram0".
# Error loading design

In my command can you check, this is the correct way of instantiating, below I posted my testbench with name tb_msp.vhd

testbench: tb_msp.vhd

---

Code VHDL - [expand]
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library IEEE;
use IEEE.std_logic_1164.all;
use work.iface.all;
use work.leonlib.all;
 
entity tb_msp is
end; 
 
architecture behav of tb_msp is
 
component mspram
  generic ( mspfile : string := "mspfile";  -- list of test files
            romfile : string := "rom.dat"); -- rom boot file
  port (  
    A      : in std_logic_vector(15 downto 0);
 
    D      : inout std_logic_vector(31 downto 0);
 
    romsel : in std_logic;
    romoen : in std_logic;
    ramsel : in std_logic;
    ramoen : in std_logic;
    write  : in std_logic_vector(3 downto 0);
    rst    : out std_logic;
    error  : in std_logic
  );
end component; 
 
TYPE logic_xlhz_table IS ARRAY (std_logic'LOW TO std_logic'HIGH) OF std_logic;
 
CONSTANT cvt_to_xlhz : logic_xlhz_table := (
                         'Z',  -- 'U'
                         'Z',  -- 'X'
                         'L',  -- '0'
                         'H',  -- '1'
                         'Z',  -- 'Z'
                         'Z',  -- 'W'
                         'Z',  -- 'L'
                         'Z',  -- 'H'
                         'Z'   -- '-'
                        );
 
signal clk : std_logic := '1';
signal Rst    : std_logic;          -- Reset
constant romfile : string := "us2test/bootmsp.rom";
constant mspfile : string := "us2test/mspfiles";
 
signal address  : std_logic_vector(27 downto 0);
signal data     : std_logic_vector(31 downto 0);
signal sa       : std_logic_vector(14 downto 0);
signal sd       : std_logic_vector(63 downto 0);
 
signal ramsn    : std_logic_vector(4 downto 0);
signal ramoen   : std_logic_vector(4 downto 0);
signal wrn      : std_logic_vector(3 downto 0);
signal romsn    : std_logic_vector(1 downto 0);
signal iosn     : std_logic;
signal oen      : std_logic;
signal read     : std_logic;
signal write    : std_logic;
signal brdyn    : std_logic := '0';
signal bexcn    : std_logic := '1';
signal error    : std_logic;
signal wdog     : std_logic;
signal dsuen, dsutx, dsurx, dsubre, dsuact : std_logic;
signal test     : std_logic := '0';
 
signal pio  : std_logic_vector(15 downto 0);
signal GND : std_logic := '0';
signal VCC : std_logic := '1';
signal NC : std_logic := 'Z';
signal sdcke    : std_logic_vector ( 1 downto 0);  -- clk en
signal sdcsn    : std_logic_vector ( 1 downto 0);  -- chip sel
signal sdwen    : std_logic;                       -- write en
signal sdrasn   : std_logic;                       -- row addr stb
signal sdcasn   : std_logic;                       -- col addr stb
signal sddqm    : std_logic_vector ( 7 downto 0);  -- data i/o mask
signal sdclk: std_logic;       
signal plllock: std_logic;       
 
function buskeep (signal v : in std_logic_vector) return std_logic_vector is
variable res : std_logic_vector(v'range);
begin
  for i in v'range loop res(i) := cvt_to_xlhz(v(i)); end loop;
  return(res);
end;
 
begin
 
  clk <= not clk after 10 ns;
 
  pio(1 downto 0) <= "11";  -- 32-bit data bus
  pio(2) <= '1';        -- EDAC enable
  wdog <= 'H';
  dsuen <= '0'; dsurx <= '1'; dsubre <= '0';
  error <= 'H';
 
 
  p0 : leon port map (
            rst, clk, sdclk, plllock, 
 
        error, address, data, 
 
        ramsn, ramoen, wrn, romsn, iosn, oen, read, write, brdyn, 
        bexcn, sdcke, sdcsn, sdwen, sdrasn, sdcasn, sddqm, sdclk, sa, sd, 
        pio, wdog, dsuen, dsutx, dsurx, dsubre, dsuact, test);
 
  mspram0 : mspram 
    generic map (mspfile => mspfile, romfile => romfile)
    port map ( 
    A   => address(15 downto 0), 
 
    D(31 downto 0)   => data(31 downto 0),
    romsel => romsn(0),
    romoen => oen,
    ramsel => ramsn(0),
    ramoen => ramoen(0),
    write => wrn,
    rst => rst,
    error => error
    );
 
  data <= buskeep(data) after 5 ns;
end ;

---

 

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Try something more like this:

vsim -sdfmin /tb_msp/mspram0 = /home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/iusyn_gates.sdf

The syntax is vsim -sdfmin [<instance>=]<filename>, the instance name is the hierachical instance name you are trying to annotate so shouldn't include your directory hierarchy to the design file.

Regards

 

[abu9022]

Hi Friend,

still I am getting same type of error

vsim -sdfmin /tb_msp/mspram0 = /home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/iusyn_gates.sdf
# vsim -sdfmin /tb_msp/mspram0 =
# ** Error: (vsim-SDF-3196) Failed to find SDF file "/tb_msp/mspram0".
# Error loading design

in my previous command, there is a problem in Instantiating, my teacher told to change

when I type new command, i got message as "no design specified"

vsim -sdftyp /tb_msp/p0/mcore0/proc0/iu0/iu1=/home/ee5113/zxv764/sdfvsim/leon2-1.0.30-xst/iusyn_gates.sdf
# No design specified

 

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Every command line you show is pointing to a different instance name?

The sdf file has to be applied to the correct instance otherwise it will fail.

Also there is more to the vsim command line than an -sdftyp instace_name=path_name/sdf_file command switch you need to include at a minimum the compiled netlist that you plan on simulating. You also will likely need the -L compile_library_name switches.

Regards