Failed to annotate SDF due to netlist and library coding.

[kelvin_sg]

sdfnep

I found that the SDF from the P&R engineer doesn't match with the description
in the standard cell library, which caused some annotation failures.

It looks to me that both SDF and model coding are correct, only that they used
different styles...

How am I going to deal with such situation?

Thank you.




In the SDF annotation of ncverilog: 05.10-s016...
----------------------------------------

ncelab: *W,SDFNEP: Failed Attempt to annotate to non-existent path (IOPATH (posedge A1) X) of instance sim.chip.add_132.U4 of module OR2X1000 </home/worst.sdf, line 48010>.
ncelab: *W,SDFNEP: Failed Attempt to annotate to non-existent path (IOPATH (negedge A1) X) of instance sim.chip.add_132.U4 of module OR2X1000 </home/worst.sdf, line 48011>.
ncelab: *W,SDFNEP: Failed Attempt to annotate to non-existent path (IOPATH (posedge A2) X) of instance sim.chip.add_132.U4 of module OR2X1000 </home/worst.sdf, line 48012>.
ncelab: *W,SDFNEP: Failed Attempt to annotate to non-existent path (IOPATH (negedge A2) X) of instance sim.chip.add_132.U4 of module OR2X1000 </home/worst.sdf, line 48013>.





In the standard cell library, the segment regarding the timing:
----------------------------------------
// PATH DELAY
if(A1 == 1'b0) (A1 => X) = (50:50:50 , 50:50:50);
if(A1 == 1'b1) (A1 => X) = (50:50:50 , 50:50:50);
if(A2 == 1'b0) (A2 => X) = (50:50:50 , 50:50:50);
if(A2 == 1'b1) (A2 => X) = (50:50:50 , 50:50:50);
`ifdef no_ifnone
`else
ifnone (A1 => X) = (50:50:50 , 50:50:50);
ifnone (A2 => X) = (50:50:50 , 50:50:50);
`endif


In the SDF file, one segment:
----------------------------------------
(CELL
(CELLTYPE "OR2X1000")
(INSTANCE add_132/U4)
(DELAY (ABSOLUTE
(IOPATH (posedge A1) X (50:50:50) (50:50:50))
(IOPATH (negedge A1) X (50:50:50) (50:50:50))
(IOPATH (posedge A2) X (50:50:50) (50:50:50))
(IOPATH (negedge A2) X (50:50:50) (50:50:50))
))
)

 

[siawklai]

failed attempt to annotate to non-existent path

I think probably is due to the fact that the IOPATH statements in the
sdf file do not match the module path delays in the verilog library code as your library code didn't have posedge and negedge information.

Please try the following code:

specify
// module path delays
( posedge A1 => X ) = (50:50:50 , 50:50:50);
( negedge A2 => X ) = (50:50:50 , 50:50:50);
( posedge A1 => X ) = (50:50:50 , 50:50:50);
( negedge A2 => X ) = (50:50:50 , 50:50:50);
endspecify

Hope it can work.

 

[kctang]

sdf annotation cell not found in netlist

Hi,

It's one common problem encountered in SDF annotation. It is caused by different timing arcs defined between syn. & P&R libraries. I know that some library vendors do provide some scripts (perl or tcl) to translate the post P&R SDF to the format which verilog library can annotate timing correctly. Please check with your library documentation ;^)

 

[kelvin_sg]

failed attempt to annotate to non-existent path

I am a good fated guy! The P&R engineer managed to convert the SDFs into
some more friendly formats...

It is called Regex (Regular Expression) in Perl and Unix shell. It's a very
simple instruction in Perl. Once understood, it becomes easy...

Thank you all for your replies.

 

[haosg]

unable to annotate to non-existent path

in PT, "write_sdf -noedge", it would combine negedge and falledge.

 

[kelvin_sg]

sdf ifnone

Do you think it is okie to first annotate the
netlist & problematic SDF file into PT, then use write_sdf -noedge to get a better netlist?

Thanks.