F.E.C. , parity generator.

Status
Not open for further replies.

Titormos

Newbie level 2
Joined
Dec 9, 2011
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,302
Hello,
I am currently working on a 10 Gbps optic fiber connection that is going to have a FEC circuit.
I am done with many parts of the circuit but I am stuck at the parity generator.

this is how it is described.
it actually has an example with the input and output of this mathematical expression and obviously you don't get a correct parity when you interpret each symbol as a mathematical one.
x^32 is a sift left as it says
and the problem is the modulo operator. I've tried many ways of calculating that but nothing was right.
one of them is the creation of a 2112 bit wide(that the input to the parity generator) shift register that "xors" the bits specified by the g(x) polynomial, which results in a false result after 2112 shifts (also at 2112-32 shifts)

any help is appreciated.
thanks in advance.

P.S. I am not sure if this is on the right section of the forum.

edit: I wanted to explain that p(x) is the parity and that is the thing I want to calculate. I don't know what the modulo operation means.
 
Last edited:

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…