sir
i am priya. i got a frequency counter program can u explan that code in detail. plz the replay in my
toay itself i want that explanation
[CODE]library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity stepone is
port ( inp_clk1 : inout std_logic;
inp_clk2 : inout std_logic;
inp_clk3 : inout std_logic;
inp_clk4 : inout std_logic;
ref_clk : in std_logic;
rst : in std_logic;
ref_clk1_rising_pin : out std_logic;
--------------------------------------------------------------
CHANNELSEL: IN STD_LOGIC_VECTOR(3 DOWNTO 0);
--------------------------------------------------------
DATA : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
RS,RW,E : OUT STD_LOGIC
);
end stepone;
architecture Behavioral of stepone is
type b is array (5 downto 0) of integer;
signal a:integer;
signal ll:integer;
signal count : std_logic_vector(15 downto 0);
signal ref_clk1_sync_reg : std_logic_vector(1 downto 0);
signal ref_clk1_rising : std_logic;
signal ref_clk1 : std_logic;
signal count1 : std_logic_vector(15 downto 0); ------- for the divider
----------------------------------------------------
signal inp_clk:std_logic;
signal oup_freq:std_logic_vector((15) downto 0);
SIGNAL C1,C2,C3,C4,C5,A1 :STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL SIGA: STD_LOGIC_VECTOR(3 DOWNTO 0):="0000";
-----------------------------------------------
SIGNAL S: STD_LOGIC_VECTOR(18 DOWNTO 0):= (OTHERS=>'0');
SIGNAL SIGL: STD_LOGIC_VECTOR(7 DOWNTO 0):="00000000";
SIGNAL CLKDIV : STD_LOGIC:='0';
signal D1: std_logic_vector(15 downto 0);
signal D2: std_logic_vector(15 downto 0);
signal D3: std_logic_vector(15 downto 0);
signal D4: std_logic_vector(15 downto 0);
signal D5: std_logic_vector(15 downto 0);
SIGNAL CH:STD_LOGIC_VECTOR(1 DOWNTO 0);
SIGNAL CHANNEL: STD_LOGIC_VECTOR(7 DOWNTO 0);
begin
PROCESS(ref_clk,CHANNELSEL)
BEGIN
IF (RISING_EDGE(ref_clk)) THEN
CASE CHANNELSEL IS
WHEN "0001"=>
CH<="00";
inp_clk<=inp_clk1;
WHEN "0010"=>
CH<="01";
inp_clk<=inp_clk2;
WHEN "0100"=>
CH<="10";
inp_clk<=inp_clk3;
WHEN "1000"=>
CH<="11";
inp_clk<=inp_clk4;
WHEN OTHERS=> NULL;
END CASE;
END IF;
END PROCESS;
------------ generating 1KHz from 48 MHz ------
process(rst,ref_clk)
begin
if(rst='0')then
count1<=(others=>'0');
elsif(ref_clk'event and ref_clk='1')then
if(count1 = 48000)then
count1<= (others=>'0');
else
count1<= count1 + 1;
end if;
end if;
end process;
ref_clk1 <= count1(15);
----------- synchronizing inp_clk with ref_clk--------------
process(inp_clk,ref_clk1)
begin
if(inp_clk'event and inp_clk='1')then
ref_clk1_sync_reg <= ref_clk1_sync_reg(0) & ref_clk1;
end if;
end process;
--------------- finding rising edge --------------
ref_clk1_rising <= not(ref_clk1_sync_reg(1)) and ref_clk1_sync_reg(0);
ref_clk1_rising_pin <= ref_clk1_rising;
--------------- freq_counter -------
process(rst,inp_clk,ref_clk1_rising)
begin
if(rst='0')then
count <= (others=>'0');
oup_freq <= (others=>'0');
elsif(inp_clk'event and inp_clk='1')then
count <= count+1;
if(ref_clk1_rising ='1')then
count <= (others=>'0');
oup_freq <= count;
end if;
end if;
end process;
--------------------------------asciii--------------------
PROCESS(ref_clk,oup_freq)
BEGIN
IF (RISING_EDGE(ref_clk)) THEN
SIGA<=SIGA+1;
CASE SIGA IS
WHEN "0001"=>
C1<="0000000000000000";
C2<="0000000000000000";
C3<="0000000000000000";
C4<="0000000000000000";
C5<="0000000000000000";
A1<=oup_freq;
WHEN "0010"=>
IF A1>="0010011100010000" THEN ---10000
SIGA<="0011";
ELSE
SIGA<="0100";
END IF;
WHEN "0011"=>
A1<=A1-"0010011100010000";
C1<=C1+1;
SIGA<="0010";
WHEN "0100"=>
IF A1>="0000001111101000" THEN --1000
SIGA<="0101";
ELSE
SIGA<="0110";
END IF;
WHEN "0101"=>
A1<=A1-"0000001111101000";
C2<=C2+1;
SIGA<="0100";
WHEN "0110"=>
IF A1>="0000000001100100" THEN --100
SIGA<="0111";
ELSE
SIGA<="1000";
END IF;
WHEN "0111"=>
A1<=A1-"0000000001100100";
C3<=C3+1;
SIGA<="0110";
WHEN "1000"=>
IF A1>="0000000000001010" THEN --10
SIGA<="1001";
ELSE
SIGA<="1010";
END IF;
WHEN "1001"=>
A1<=A1-"0000000000001010";
C4<=C4+1;
SIGA<="1000";
WHEN "1010"=>
C5<=A1;
WHEN "1011"=>
D1<=C1+"0000000000110000";
D2<=C2+"0000000000110000";
D3<=C3+"0000000000110000";
D4<=C4+"0000000000110000";
D5<=C5+"0000000000110000";
SIGA<="0000";
WHEN OTHERS=> NULL;
END CASE;
END IF;
END PROCESS;
---------------------------------------------------lcd-------------------------
PROCESS(ref_clk)
BEGIN
IF (RISING_EDGE(ref_clk)) THEN
S<=S+1;
IF S(18 DOWNTO 17)="01" THEN
CLKDIV<= '1';
ELSIF S(18 DOWNTO 17)="10" THEN
CLKDIV<= '0';
S<= (OTHERS=>'0');
END IF;
END IF;
END PROCESS;
-------------------------------------
PROCESS(CLKDIV)
BEGIN
IF(RISING_EDGE(CLKDIV)) THEN
SIGL<= SIGL+1;
CASE SIGL IS
WHEN "00000001" => RS<= '0';
RW<= '0';
CHANNEL<="000000" & CH;
WHEN "00000010" => DATA<= "00000011"; --0X03
WHEN "00000011" => E<='1';
WHEN "00000100" => E<= '0';
-- WHEN "00000101" => DATA<= "0011";
-- WHEN "00000110" => E<='1';
-- WHEN "00000111" => E<= '0';
WHEN "00000111" => DATA<= "00000011"; --0X03
WHEN "00001000" => E<='1';
WHEN "00001001" => E<= '0';
-- WHEN "00001101" => DATA<= "0011";
-- WHEN "00001110" => E<='1';
-- WHEN "00001111" => E<='0';
WHEN "00001100" => DATA<= "00000011"; --0X03
WHEN "00001101" => E<='1';
WHEN "00001110" => E<='0';
--WHEN "00010101" => DATA<= "0011";
-- WHEN "00010110" => E<='1';
-- WHEN "00010111" => E<='0';
WHEN "00010001" => DATA<= "00111000"; --0X28
WHEN "00010010" => E<='1';
WHEN "00010011" => E<='0';
-- WHEN "00011011" => DATA<= "1000";
-- WHEN "00011100" => E<='1';
-- WHEN "00011101" => E<='0';
WHEN "00010110" => DATA<= "00000110"; --0X06
WHEN "00010111" => E<='1';
WHEN "00011000" => E<='0';
-- WHEN "00100001" => DATA<= "0110";
-- WHEN "00100010" => E<='1';
-- WHEN "00100011" => E<='0';
WHEN "00011011" => DATA<= "00000001"; --0X0C
WHEN "00011100" => E<='1';
WHEN "00011101" => E<='0';
-- WHEN "00100111" => DATA<= "1100";
-- WHEN "00101000" => E<='1';
-- WHEN "00101001" => E<='0';
WHEN "00100000" => DATA<= "00001111"; --0X01
WHEN "00100001" => E<='1';
WHEN "00100010" => E<='0';
--WHEN "00101101" => DATA<= "0001";
--WHEN "00101110" => E<='1';
-- WHEN "00101111" => E<='0';
WHEN "00100101" => DATA<= "10000000"; --0X80
WHEN "00100110" => E<='1';
WHEN "00100111" => E<='0';
-- WHEN "00110011" => DATA<= "0000";
-- WHEN "00110100" => E<='1';
-- WHEN "00110101" => E<='0';
WHEN "00101000" => RS<= '1';
WHEN "00101001" => DATA<= "01000011"; --DATA 'C' 0X43
WHEN "00101010" => E<='1';
WHEN "00101011" => E<='0';
-- WHEN "00111010" => DATA<= "0011";
-- WHEN "00111011" => E<='1';
-- WHEN "00111100" => E<='0';
WHEN "00101110" => DATA<= "01001000"; --DATA 'H' 0X48
WHEN "00101111" => E<='1';
WHEN "00110000" => E<='0';
-- WHEN "01000000" => DATA<= "1000";
-- WHEN "01000001" => E<='1';
-- WHEN "01000010" => E<='0';
WHEN "00110011" => DATA<= "01000001"; --DATA 'A' 0X41
WHEN "00110100" => E<='1';
WHEN "00110101" => E<='0';
-- WHEN "01000110" => DATA<= "0001";
-- WHEN "01000111" => E<='1';
-- WHEN "01001000" => E<='0';
--
WHEN "00111000" => DATA<= "01001110"; --DATA 'N' 0X4E
WHEN "00111001" => E<='1';
WHEN "00111010" => E<='0';
-- WHEN "01001100" => DATA<= "1110";
-- WHEN "01001101" => E<='1';
-- WHEN "01001110" => E<='0';
WHEN "00111101" => DATA<= "01001110"; --DATA 'N' 0X4E
WHEN "00111110" => E<='1';
WHEN "00111111" => E<='0';
-- WHEN "01010010" => DATA<= "1110";
-- WHEN "01010011" => E<='1';
-- WHEN "01010100" => E<='0';
WHEN "01000010" => DATA<= "01000101"; --DATA 'E' 0X45
WHEN "01000011" => E<='1';
WHEN "01000100" => E<='0';
-- WHEN "01011000" => DATA<= "0101";
-- WHEN "01011001" => E<='1';
-- WHEN "01011010" => E<='0';
--
WHEN "01000111" => DATA<= "01001100"; --DATA 'L' 0X4C
WHEN "01001000" => E<='1';
WHEN "01001001" => E<='0';
-- WHEN "01100100" => DATA<= "1100";
-- WHEN "01100101" => E<='1';
-- WHEN "01100110" => E<='0';
WHEN "01001010" => DATA<= CHANNEL; --DATA CHANNEL
WHEN "01001011" => E<='1';
WHEN "01001100" => E<='0';
-- WHEN "01101010" => DATA<= CHANNEL;
-- WHEN "01101011" => E<='1';
-- WHEN "01101100" => E<='0';
--
WHEN "01001101" => RS<='0';
WHEN "01001111" => DATA<= "11000000"; --0XC0
WHEN "01010000" => E<='1';
WHEN "01010001" => E<='0';
-- WHEN "01110001" => DATA<= "0000";
-- WHEN "01110010" => E<='1';
-- WHEN "01110011" => E<='0';
WHEN "01010010" => RS<='1';
WHEN "01010011" => DATA<= D1(7 DOWNTO 0); --D1
WHEN "01010100" => E<='1';
WHEN "01010101" => E<='0';
-- WHEN "01111000" => DATA<= D1(3 DOWNTO 0); --D1
-- WHEN "01111001" => E<='1';
-- WHEN "01111010" => E<='0';
--
WHEN "01010110" => DATA<= D2(7 DOWNTO 0); --D2
WHEN "01010111" => E<='1';
WHEN "01011000" => E<='0';
-- WHEN "01111110" => DATA<= D2(3 DOWNTO 0); --D2
-- WHEN "01111111" => E<='1';
-- WHEN "10000000" => E<='0';
WHEN "01011001" => DATA<= D3(7 DOWNTO 0); --D3
WHEN "01011010" => E<='1';
WHEN "01011011" => E<='0';
-- WHEN "10000100" => DATA<= D3(3 DOWNTO 0); --D3
-- WHEN "10000101" => E<='1';
-- WHEN "10000110" => E<='0';
WHEN "01011100" => DATA<= D4(7 DOWNTO 0); --D4
WHEN "01011101" => E<='1';
WHEN "01011110" => E<='0';
-- WHEN "10001010" => DATA<= D4(7 DOWNTO 0); --D4
-- WHEN "10001011" => E<='1';
-- WHEN "10001100" => E<='0';
WHEN "01011111" => DATA<= D5(7 DOWNTO 0); --D5
WHEN "01100000" => E<='1';
WHEN "01100001" => E<='0';
-- WHEN "10010000" => DATA<= D5(7 DOWNTO 0); --D5
-- WHEN "10010001" => E<='1';
-- WHEN "10010010" => E<='0';
WHEN OTHERS=> NULL;
END CASE;
END IF;
END PROCESS;
end Behavioral;[/CODE]