Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Explanation of the LOD effect

Status
Not open for further replies.
length of diffusion lod

Are you referring to Length of Diffusion effect? Well, it's a phenomenon that is causing some detrimental effects on some circuit performance in deep sub-micron process (0.13um and below). I am not a process guy, so I may not be able to explain the exact reason behind it. But what I do know is that LOD effect causes the characteristics of transistors to change, particularly the vth and Idsat. As the distance from the edge of the poly gate to the boundary of diffusion area varies, so do the properties of the transistor. Let's say you have ten transistors on one stretch of diffusion. The transistors at the centre of the diffusion strip and the transistors at the sides have different properties e.g. vth may vary by 20mV. This in turn translates to offset and some other circuit imperfections. Hope my explanation is clear to you. Good day!
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top