expanding BW using feedback question

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Hello,I have built the following two stage amplifier as shown bellow.
In open loop i get 63dB gain and BW about 3Khz.
when i tried to add a feedback resistor to lower the gain and increase the bandwidth as shown in the formula below i get no change at all.
two stage amplifier with feedback is shown in the end.
Where did i go wrong in implementing the feedback effect of feedback ressistor to lower the gain and increase the bandwidth?
Thanks.








 

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If you added a cap versus a R you would have a form of feed forward compensation,
but one would have to do the stability analysis.


Regards, Dana.
 

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Hello danadakk, i have implemented the feedback shown bellow and got an increase of BW from 3K to 30K as shown bellow.
Is there some alternative OPAMP i can use to increase much more my BW?(to 5MHz)
Thanks.
 

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Hi,

yefj said:
Is there some alternative OPAMP i can use to increase much more my BW?(to 5MHz)
Click to expand...
I guess thousands.

Just use an OPAMP search for high GBW.
OPAMP search are provided by
* all OPAMP manufacturers
* almost all semiconductor distributors
* others

In case you don´t know about "GBW" do an internet search for "OPAMP GBW" (GBP, GBWP...)

Klaus
 

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Hello Klauss, i have tried to change the OPAMP to a higher BW one its not changing at all the transfer function.
Could you please recommend me some material regarding higher BW OPAMP implementation?
Thanks.
 

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Expectable because the bandwidth is limited by RC values rather than OP GBW. To achieve 5 MHz, a faster OP than 0.6 MHz OP07 is however required. I wonder what's the purpose of the 2 OP cascade circuit, is it a specific exercise? You can make your life easier by using a single OP of sufficient GBW, consider GBW factor 3-10 higher than intended closed loop gain * BW.
 

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Hello, i Have used 350MHZ BW and it still doesnt work.
I want to make a two section cascode integrator with 5MHZ BW.
Is there some material or other configuration that could help?
Thanks.

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I presume you are trying to do this :



Do you care if design is inverting or non inverting ?

Your spec of 5 Mhz implies G @ 5 Mhz = 0 db, thats correct ?

What -3db break are you willing to live with ?


Regards, Dana.
 

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I want my design to be non inverting
i care about 5Mhzbandwidth more the the gain.
5Mhz =0dB correct
any other implementation?
 

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yefj said:
I want to make a two section cascode integrator with 5MHZ BW.
Click to expand...
To achieve what? Do you mean single (1/s) or double (1/s^2) integrator? Please specify the desired transfer function F(s) or sketch the magnitude response.
 

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If you dont like Zin consider a G = -1 inverting follower at input :



Note C2 is estimated stray C.


Regards, Dana.
 
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    yefj

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Hi,

yefj said:
Hello Klauss, i have tried to change the OPAMP to a higher BW one its not changing at all the transfer function.
Could you please recommend me some material regarding higher BW OPAMP implementation?
Thanks.
Click to expand...
It's all confusing.

You say you want high bandwidth, but
* you use a slow OPAMP
* additionally you limit the bandwith by using the external Cs

You say you want integrator, but
* the circuit does not show an integrator at all

You say you want non inverting, but
* you use an inverting circuit ... then need two of them to get it non inverting

I have no clue want you really want.

Klaus
 

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Note when you work with very fast OpAmps like this pay specific attention
to datasheet guidance on power supply bypassing at the OpAmp pins.


Regards, Dana.
--- Updated ---

He went to a fast OpAmp in post #8.

Regards, Dana.
 

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Hello Klauss, I have achieved my goal of increasing the BW.
I have a problem related to it if its ok i will post it in a new question.

 

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yefj said:
Hello Klauss, I have achieved my goal of increasing the BW.
I have a problem related to it if its ok i will post it in a new question.
View attachment 183426
View attachment 183425
Click to expand...

Thats not much of an integrator response with such high initial 3 db breakpoint.

Did you do a transient sim on it, with timestep somewhere around 10 nS ? To
do a gross check of stability. And I see you have no stray C elements at OpAmp
inputs. I see phase is crossing 180 with amp still showing G, and some peaking
in response curve, read stability will be of concern. Lastly your architecture is having
fdbk in a non inverting loop, another stability issue.


Regards, Dana.
 

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