ERROR:Place:120 - There were not enough sites to place ...

[mehrara]

errorlace:120

hi
I am trying to implement a Viterbi decoder on a Xilinx V-II (XC2V1000-4)
but during the placement after warnings of the following type:
WARNINGlace:119 - Unable to find location. TBUF component up0_I12_8 not
placed.
TBUF "up0_I12_8".
the placer halts with the following error:
ERRORlace:120 - There were not enough sites to place all selected components
I should mention that when I set timing driven packing and placement in mapping properties the mapping process also halts with the same error.
I use ISE 6.1i and I XST.
thanks

 

[yerics]

ise place 120

how many TBUF you have used?
did you open your design with FPGA EDITOR to see whether it is true that there is no more TBUF to be placed .

moreover, XC2V1000-4 support TBUF or not?