During my W/L sizing in schematic design while using TSMC 45nm technology, I faced this issue of finger spacing. I did before also, but I never noticed this error. My MOSFET width size is 60. As I cannot set the MOSFET width more than 1.5um in this schematic design, so I prefer 1.5um as each width size and 40 as the number of fingers.
Is this error can be avoidable? Or there is something I have done wrong?
The error written in the picture is: "Finger spacing cannot be less than '0.16um' - setting finger spacing to 0.16um (P0.S.7)"