for example, if we missed to place the End Cap cells in your design, then what kind of violations it will show and where that violations can be caught i.e., in which stage and which check we need to do to find such kind of violations?
The more advanced the process, the more it needs to be added.
tsmc40nm dont have endcap cell, we only need add filler cell on row end.
but tsmc28nm have a cell named endcap, we must add those cell at end row.