Encounter Ant type error meaning

Status
Not open for further replies.
S

songzm2008

Newbie level 6
Joined
Nov 9, 2009
Messages
13
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,358
when I use "Verify --> Verify Process Antenna" to verify ant violation in Encounter,
there are 2 resuts ,one is named "Area Ratio" the other is named "Side Area Ratio",
Can you tell me what's the difference between those.
 

Area ratio:

The router automatically shortens wires whose area exceeds the gate/wire area ratio set in
the LEF file. This process might not guarantee that it can resolve all antenna violations—if the
routing area is congested, process antenna violations can still occur, just as shorts and
spacing violations can occur.
 

hi ,

Pleas refer the folowing blog for this. It will provide you indept knowledge about the Antenna Effects and how the rules comes from the foundry and how its codded in the different Tool.
VLSI concepts: Antenna Effects

Just in short
Antenna Ratio = 2[(L+W1)*t]/W2*l
L: floating metal length connected to gate
W1: floating metal width connected to gate
t: metal thickness
W2: connected transistor channel width
l: connected transistor channel length

There are 2 ways to calculate antenna area:
Side-Wall Area = (W + L) * 2 * Thickness
Polygon Area = W * L

So if you are using Antenna area as per Side-Wall Area then your rule is correspond to "Side-Area Ratio" and in other case it wil be "Area Ratio"

Please let me know if you have anyother confusion.
Thanks,
-Birdy
 
Last edited:
i have had problems in the past using encounter to verify drc and antennas. the tool reported several false errors. if possible use some virtuoso integrated tool.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…