Elementary error amplifier for SMPS feedback compensation?

congrats - according to feedspot you have posted this qu on at least 4 platforms

given the inverting op amp is high speed its output will go to rail before the power stage can react - then it will go the other way - so you will have created a high power triangle wave oscillator, possibly with clipped tops ...

Thanks , and if you put a capacitor, say 100nF in parallel to the feedback resistor, then you have a really stable PSU?...may ring a bit but osc will always die out if CC is big enough?

I think Basso calls this the "Type 2b" error amp, btu i am not sure, i onkly see a small reference to it, and no schem, on page 262 of his book switch mode power supplies.

4 platforms

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I am not expecting much on this at all whatsoever, its a very rare type of error amp....an inv amp with a big cap in parallel with the feedback R....nobody but nobody seems to use it...for anything..

Finally found out the name ,...after viewing Basso's "Designing control loop sfor linear & switchign Power supplies"...page 265...Type 2b is what its called!!!!...only Basso had info on it...nowehere on the www has anything.

Basso doesnt say what is the advantage of it over the other errror amp types, (if any) or what application you woudl use it in.

Why woudl you ever use a Type 2b instead of a Type 1 compensator?....surely a type 2b is needlessly reducing your phase margin?

"Type 2b compensator" on any search engine reveals zero hits.
The whole point of the error amp in smps is in general to garner high gain at dc, so why woudl anyone want a type 2b compensator?

cupoftea said:

The whole point of the error amp in smps is in general to garner high gain at dc, so why woudl anyone want a type 2b compensator?

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I'd rather say, the whole point is achieving stability.

No matter if you classify your error amplifier as "type 2b" error amplifier or simply as P controller, it can't have high gain and sufficient phase margin at the same time. Because the achievable gain is determined by the transition frequency. While type 2 has increasing gain towards lower frequencies, type 2b has not. Respectively it shows permanent DC error.

According to literature, the type 1-3 terminology has been introduced by Dean Venable. There's no type 2a or 2b in the original paper, neither in Pressman who has mainly popularized the terminology.

Thanks, do you agree with following....i think with batt chargers, their is a very low frequency power stage load zero, due to esr of battery...which has enormous capacitance...so you need the low gain at low frequency of the type 2b compensator...would you agree?
There must be situations with power stage zeros at low frequency, where you need to get the gain down fast, for stability, and the type 2b does that for you.......this must be the case, otherwise there would be no such thing as type 2b, as type 1 has only 1 capacitor in the feedback, so if type 2b was never better than type 1, then type 2b would not even exist on the "map"...

Battery charger voltage control can be really slow. No problem to design a controller. Type 2 respectively PI is always applicable.

given the inverting op amp is high speed its output will go to rail before the power stage can react - then it will go the other way - so you will have created a high power triangle wave oscillator, possibly with clipped tops ...

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Thanks for this, my apologies, i had forgotten to include that there is a capacitor in parallel with the feedback resistor

a drawing is worth generally a few hundred words at least - and saves every one a lot of time too ...

also - you specifically said " not integrating " which is what the cap does - the direct implication being no cap - pure inverting structure.

a drawing is worth generally a few hundred words at least - and saves every one a lot of time too ...

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Thanks, the following is what i meant (attached).

Its the resistor R9, why ever would anyone want to use it?...ok it works, but it surely reduces the phase margin.
The U2 based error amp regulates the current to approx 34A

PDF and LTspcie sim attached.......The one marked unstable is the one with insufficient phase margin, (it has a 470nF cap (C11) in the feedback) but the customer recomended that we use it.

surely the customer knows best ( haha ) btw you don't need two shunts in series - the opamps will work just fine on the same shunt ...

With reasonable selection of compensator frequencies, R9 doesn't reduce phase margin but DC gain. The basic behavior is type 2 with R9 additionally limiting the DC gain. It has been possibly implemented to reduce integrator wind-up, but there are better ways. C11 is standard in type 2 compensators and as far as I understand has the purpose of reducing high frequency noise. Although R4*C11 pole should be above the loop transition frequency, it's of course reducing phase margin.

As previously mentioned, a battery charger isn't a particularly demanding control application. Any solution that is stable over the expected load impedance range should be o.k.

btw you don't need two shunts in series - the opamps will work just fine on the same shunt ...

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Thanks, sorry, i should have explained...one shunt is deeply embedded within the power module (we cant get to it) , and clamps to 41A +/- 3A. The other shunt is what we are putting in to clamp to 34A instead

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The attached is how I think the loop could be broken for injection feedback loop testing to assess gain and phase margins, would you agree?
When the signals shown are the same magnitude then that is at the loop crossover frequency.
At this frequency, the phase between the signals will be the phase margin. Do you agree?
LTspice sim and PDF schem as attached..also loop injection waveforms.

As previously mentioned, a battery charger isn't a particularly demanding control application. Any solution that is stable over the expected load impedance range should be o.k.

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Thanks, the thing is, that if the U8 based error amp has a 10k input resistor, and in the feedback has 470nF in parallel with 180k, and a reference of 1.73V.....then it goes badly unstable......this must be due to a power stage zero bringing the loop phase down very quickly, and the low frequency error amp pole isnt even able to counteract it......battery compensation in this way doesnt seem quite so easy.
...the only thing that could cause such a low powe rstage zero would be the battery ESR zero?

It has been possibly implemented to reduce integrator wind-up, but there are better ways.

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Thankyou very much, may i ask what is "integrator wind up"?

I saw this on integrator windup

But dont see how it could much use in an SMPS to achieve integrator windup with the resistor feedback in the error amp......the response of any type 2b error amp will always be worse than an optimised type 2 error amp. And i am baffled as to why they are ever used.

Admittedly the error amp would be provented from ever saturating if the feedback resistor of the type 2b EA was of low value.....but as you describe, that gives a big DC error......so in say a battery charging application....the use of a type 2b error amplifier would be a waste of time?