Electromigration in VLSI design

dick_freebird said:

You can't say one is more prone without considering the
construction and the burden.

However all things being equal except the application (i.e.
equal RMS current density), the supply net will be the worst
because its current is unidirectional (so no partial reversal
of material migration, per cycle, because no cycle).

Next worse would be the clock because while AC, it's highest
cycle rate. Logic is generally a don't-care. We would apply a
2X DC Jmax rule to periodic, reversing currents. For outputs
with signigicant pulsed load, unidirectional legs would be
criticized against the DC value for time averaged current
density, and a 10X DC limit to the pulse amplitude (these
were locally developed rules in a HiRel products organization;
unlikely you'd see the same exactly, but someone should have
published foundry*application-space EM groundrules for you.

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