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Effect of Pullup & Pulldown Circuit on LDO system stabilty

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ella1923

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Hi,
Usually a pullup & pulldown circuit is implemented in a circuit when one of the specifications of a design requires low standby current. Will this circuit affect the system stability in an LDO design? When is the proper way to design pullup/pulldown circuit?
Is this circuit (pullup/pulldown) need to be designed after obtaining all other design specifications or need to be designed while designing bias circuit?

Thank you,
ella
 

I already got an answer with this. :smile:

ella1923 said:
Hi,
Usually a pullup & pulldown circuit is implemented in a circuit when one of the specifications of a design requires low standby current. Will this circuit affect the system stability in an LDO design? When is the proper way to design pullup/pulldown circuit?
Is this circuit (pullup/pulldown) need to be designed after obtaining all other design specifications or need to be designed while designing bias circuit?

Thank you,
ella
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