Well, thanks guys for your good intentions....
Currently I'm running these ECLinPS Lite chips of ONSEMI at 2.5 Gbps, so needless to say that I'm working in the microwave range already and RF is not something I'm not familiar with.
What I need is an advice. When you approach ECL flip flop (i.e. mc100el31d) upper frequency toggle limit (2-3 GHz), many bad things happen: clock crosstalk to the outputs Q,/Q and inputs S,R,Data rises to approx 10-30% of ECL logic level, input impedances of flip flop drops from high-z to low-z
and stuff like this...
If you're familiar with ECL techology and termination schemes and considering the before mentioned problems,
what termination would be best? Parallel termination (50 ohms to Vtt) for obvious reasons doesn't cut it any more...
bye,
rfmw
edit:
@flatulent yes, i'm investigating spice modeling of the ON SEMI's chips right now and simulations roughly correspond to measurements. Thanks anyway