abhishektyagi
Newbie level 5
Hello,
I am using PrimeTime to do some power analysis of an SRAM of size 128KB generated using Arm Artisan 7nm compiler. The testbench for the same looks like the following:
I am trying to get the power numbers for a single read operation performed on the SRAM. I have verified that the testbench above give me correct output from the SRAM. But the power numbers looks like this:
I am wondering what could be the reason that static power is dominating the dynamic power in this case? Should it not be the other way around?
I am using PrimeTime to do some power analysis of an SRAM of size 128KB generated using Arm Artisan 7nm compiler. The testbench for the same looks like the following:
Code:
module sram_tb;
parameter integer SRAM_MACRO_SIZE = 156;
parameter integer NUM_SRAM_MACROS = 6553;
parameter integer ADDR_WIDTH = 15;
parameter integer MEM_SIZE = 1 << ADDR_WIDTH;
parameter integer DATA_WIDTH = 32;
reg clk;
reg [31:0] dataout ;//[NUM_SRAM_MACROS - 1 : 0];
reg [14:0] address;
reg [31:0] datain;
reg write_enable;
reg read_enable;
reg chip_enable;
reg stov;
reg [2:0] ema;
reg [1:0] emaw;
reg emas;
reg ret;
reg qnap;
reg rawl;
reg [1:0] rawlm;
reg wabl;
reg [1:0] wablm;
//clock generation
always #1.5 clk = ~clk;
sram_sp_uhde dut(
`ifdef POWER_PINS
.VDDCE(1'b1),
.VDDPE(1'b1),
.VSSE(1'b0),
`endif
.Q(dataout),
.CLK(clk),
.CEN(chip_enable),
.GWEN(write_enable),
.A(address),
.D(datain),
.STOV(1'b0),
.EMA(3'b111),
.EMAW(2'b11),
.EMAS(1'b1),
.RET(1'b0),
.QNAP(1'b0),
.RAWL(1'b0),
.RAWLM(2'b0),
.WABL(1'b1),
.WABLM(2'b0)
);
// Test stimulus
initial begin
// Initialize signals
clk = 0;
address = 15'b000000000000011;
datain = 32'b00000000000000000000000000000010;
write_enable = 1;
chip_enable = 0;
read_enable = 0;
//loadmem("random_numbers.txt");
//for (int i = 0; i < MEM_SIZE; i = i + 1) begin
$display("SRAM[%0d]: %b", address, dataout);
repeat (1) @(posedge clk) //address <= 4; //datain <= 2 % (1 << DATA_WIDTH);
$display("SRAM[%0d]: %b", address, dataout);
repeat (1) @(posedge clk) //address <= 4; //datain <= 2 % (1 << DATA_WIDTH);
$display("SRAM[%0d]: %b", address, dataout);
repeat (1) @(posedge clk) //address <= 4; //datain <= 2 % (1 << DATA_WIDTH);
$display("SRAM[%0d]: %b", address, dataout);
//// End simulation
$finish;
end
endmoduleI am trying to get the power numbers for a single read operation performed on the SRAM. I have verified that the testbench above give me correct output from the SRAM. But the power numbers looks like this:
Code:
Net Switching Power = 3.000e-05 ( 0.93%)
Cell Internal Power = 2.877e-03 (88.79%)
Cell Leakage Power = 3.331e-04 (10.28%)I am wondering what could be the reason that static power is dominating the dynamic power in this case? Should it not be the other way around?