dynamic power in asic

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mehran1367

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which power is more important in asic. dynamic power or static power?.what about fpga?
help
 

Depending of the technogy and your application, that could be one of both the major.
 

i want to know that in desgining an asic with 180nm technology which power is more important?
 

both are components of a total power as we know - hence both are important
The target would be determined by the application or the available power source and frequency
 

mehran1367 said:
i want to know that in desgining an asic with 180nm technology which power is more important?
Click to expand...

Generally, as the technology shrink, the leakage power become more and more important.
This is because the leakage power is comparable to dynamic power and can't be neglected once more.

Back to your case, for the process of 180nm, leakage power is not important since it's small.
I guess that it's under 100 uW or maybe much lower than I have thought.
(sorry~ I forget the number of power consumption for 180nm)

As I have known,
Under the process of 90nm, the leakage power will be considered when implementing a new design.
 
I am not agree with you, that really dependant of the application.
We currently design a chip with leakage target is 200nA, in 0.18TSMC, with more 100kGate, embedded Flash, here the major target is the leakage not the dynamic, because the application is medical, human body embedded.
 

rca said:
that really dependant of the application.
Click to expand...

yes, you are right. it depends on application.
mobile device will pay more attention to leakage power compared to other device.
but when the leakage power is not comparable to dynamic power, this can be neglected
( but it also depends on how long your standby state is ).
process for 90-180nm is just the intersection of this.
 

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