Dual jk flip flop counter

[Tom Jones]

Hi guys i am trying to make a dual flip flop display that functions like a digital clock the i have made to counters that count from 0-9 and 0-5 how can i sync them so that the 0-5 clock goes up by one each time the 0-9 clock starts over here is what i have so far dont mind that and gate linking the two.

 

[BradtheRad]

You need to construct an overflow signal, which will change state when the 4 flip-flops change from 1001 to 0000.

By connecting this wire to the next column (that is, the 0-5 column), it will cause it to increment.

If you are already getting a reset from 9 to 0, then I believe you already have the overflow wire available.

 

[D.A.(Tony)Stewart]

Several approaches will improve your understanding of how to implement.
1. State diagram method
2. Timing Diagram method :?:
3. Reverse Engineer method
e.g. See how a CD4518 dual decade counter is different from a binary counter and consider similar gating structure for 00 to 59 ?
Although these use D FF's, it would be same if JK=1 and you use gating logic for C instead of controlling JK separately.

 

[Tom Jones]

Thanks for the input my teacher used an and gate that took 4 inputs from the 0-9 counter and linked it with the other one dont know what approach that is but it worked thanks anyway

 

[D.A.(Tony)Stewart]

It is not the answer that is important but rather the logic used to get it. Ask him.

I would say since you have more 4 memory cells ( required for counts > 8, <=16)
that the gating must be at least 4 inputs wide to define the state required to restart the cycle., just like in the Reverse Eng example.

But how will you design something much more complicated, but just as easy to solve without trying some routine approaches like logic tables or state diagrams. Of course once you get good at design, there are shortcuts.