sainiparvesh
Newbie level 6
Hi,
I am converting a single charge pump PLL having loop element as R, Cbig, Csmall and CP current as Icp, into dual charge pump PLL having loop element R(=1/gm, unity gain buffer o/p impedence), Cbig/2, Csmall/2 and proportional and integral charge pump current as Icp and Icp/2. As per MATLAB simulations it gives aprox. same phase margin and bandwidth but real implementation gives oscillations in control voltage and o/p freq. while origional PLL is having ~50degree PM. Is there any other parameter needs to be changed to reduce loop cap(Cbig) by 2. I have implemented R using unity gain buffer after Cbig.
I am converting a single charge pump PLL having loop element as R, Cbig, Csmall and CP current as Icp, into dual charge pump PLL having loop element R(=1/gm, unity gain buffer o/p impedence), Cbig/2, Csmall/2 and proportional and integral charge pump current as Icp and Icp/2. As per MATLAB simulations it gives aprox. same phase margin and bandwidth but real implementation gives oscillations in control voltage and o/p freq. while origional PLL is having ~50degree PM. Is there any other parameter needs to be changed to reduce loop cap(Cbig) by 2. I have implemented R using unity gain buffer after Cbig.