No, I am using 'dsPIC33FJ12MC202' only
I don't know why I had forgotten about the dsPIC33FJ12 series, I actually have a PIM module with a dsPIC33FJ12MC202, other than I rarely use these low pin count devices.
I've posted the corrected code below, it now compiles and simulates without any issues.
I've made changes only within the main.c, rather than modify your other source files.
main.c
| Code C - [expand] |
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| #include "common.h" // Common file to define all #defines
#include "Ext_mcal_InOutConfig.h"
#include "Ext_mcal_TmrConfig.h"
#include "Ext_mcal_Irq.h"
/* Configuration Bits*/
/****************************************************************************************************/
/* FBS */
#pragma config BWRP = WRPROTECT_OFF // Boot Segment Write Protect (Boot Segment may be written)
#pragma config BSS = NO_FLASH // Boot Segment Program Flash Code Protection (No Boot program Flash segment)
/* FGS */
#pragma config GWRP = OFF /* General Code Segment Write Protect (User program memory is not write-protected) */
#pragma config GSS = OFF /* General Segment Code Protection (User program memory is not code-protected) */
/* FOSCSEL */
#pragma config FNOSC = PRI /* Oscillator Mode (Primary Oscillator (XT, HS, EC)) */
#pragma config IESO = OFF /* Internal External Switch Over Mode (Start-up device with user-selected oscillator source) */
/* FOSC */
#pragma config POSCMD = HS /* Primary Oscillator Source (HS Oscillator Mode) */
#pragma config OSCIOFNC = OFF /* OSC2 Pin Function (OSC2 pin has clock out function) */
#pragma config IOL1WAY = ON /* Peripheral Pin Select Configuration (Allow Only One Re-configuration) */
#pragma config FCKSM = CSDCMD /* Clock Switching and Monitor (Both Clock Switching and Fail-Safe Clock Monitor are disabled) */
/* FWDT */
#pragma config WDTPOST = PS32768 /* Watchdog Timer Postscaler (1:32,768) */
#pragma config WDTPRE = PR128 /* WDT Prescaler (1:128) */
#pragma config WINDIS = OFF /* Watchdog Timer Window (Watchdog Timer in Non-Window mode) */
#pragma config FWDTEN = OFF /* Watchdog Timer Enable (Watchdog timer enabled/disabled by user software) */
/* FPOR */
#pragma config FPWRT = PWR128 /* POR Timer Value (128ms) */
#pragma config ALTI2C = OFF /* Alternate I2C pins (I2C mapped to SDA1/SCL1 pins) */
#pragma config LPOL = ON /* Motor Control PWM Low Side Polarity bit (PWM module low side output pins have active-high output polarity) */
#pragma config HPOL = ON /* Motor Control PWM High Side Polarity bit (PWM module high side output pins have active-high output polarity) */
#pragma config PWMPIN = ON /* Motor Control PWM Module Pin Mode bit (PWM module pins controlled by PORT register at device Reset) */
/* FICD */
#pragma config ICS = PGD2 /* Comm Channel Select (Communicate on PGC2/EMUC2 and PGD2/EMUD2) */
#pragma config JTAGEN = OFF /* JTAG Port Enable (JTAG is Disabled) */
/****************************************************************************************************/
int main(void)
{
/* The following code example will enable Timer1 interrupts, load the Timer1
Period register and start Timer1 using an asynchronous external clock and
a 1:8 prescaler setting.
When a Timer1 period match interrupt occurs, the interrupt service
routine must clear the Timer1 interrupt status flag in software.
*/
volatile int temp;
//Ext_mcal_AllPortClr();
AD1PCFGL = 0xFF; // Sets All Pins to Digital, Rather than Analog Inputs
Ext_mcal_PORTAConfig(0x0000);
Ext_mcal_TMR1Config();
Ext_mcal_IrqTmr1Config();
TMR1_CLR(0x0000);
TMR1_STRT();
IRQ_TMR1_ENABLE();
while(1)
{
temp++;
}
}
/* Example code for Timer1 ISR*/
void __attribute__((__interrupt__, __auto_psv__)) _T1Interrupt(void)
{
if(IFS0bits.T1IF == 0x01)
{
IFS0bits.T1IF = 0; //Reset Timer1 interrupt flag and Return from ISR
LATAbits.LATA0 = ~PORTAbits.RA0; // Flips the State of RA0
//Ext_mcal_PORTASetVal(SET_BIT(0)); //porta bit 1 on for testing
}
} |
The first issue is the following configuration bit setting.
Replace:
Code:
#pragma config BSS = LARGE_FLASH_STD /* Boot Segment Program Flash Code Protection (Standard Security, Large-sized Boot Flash) */
With
Code:
#pragma config BSS = NO_FLASH // Boot Segment Program Flash Code Protection (No Boot program Flash segment)
Although no strictly necessary in this case, I would recommend using auto PSV on the interrupt routine and don't forget the double underscores.
Replace:
Code:
void __attribute__((__interrupt__, no_auto_psv)) _T1Interrupt(void)
With:
Code:
void __attribute__((__interrupt__, __auto_psv__)) _T1Interrupt(void)
While the above changes will allow the ISR to be called correctly and avoid the reset condition, many of the PORTA pins are set as ADC inputs by default, therefore to change the state of RA0, you must first set them to digital inputs with the following statement:
Code:
AD1PCFGL = 0xFF; // Sets All Pins to Digital, Rather than Analog Inputs
Which now allows the RA0 pin to be configured as a digital output and set or cleared within the ISR.
Also, you should be aware that some compilers, particularly with high optimization levels set, can essentially optimize an empty while loop out of existence, therefore it's prudent to either insert an inline assembler NOP instruction or increment a volatile variable:
Code:
volatile int temp;
while(1)
{
temp++;
}
And for more of an effect, I substituted a statement which flips the state of the RA0 pin on each ISR call:
Code:
LATAbits.LATA0 = ~PORTAbits.RA0; // Flips the State of RA0
I've not had a chance yet to dig up my dsPIC33FJ12MC202 PIM, attach it to an Explorer board and test the code on hardware, however I do not foresee any issues.
So try it out on your hardware and post back to this thread if you have any other issues.
BigDog