[SOLVED] dsPIC33EP512MU810 Clock Switching not happening

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nairitb

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Hello,

First of all, I am new to PIC microcontrollers.

I made a pcb with dsPIC33EP512MU810 as the microcontroller. I have written a code to turn on a LED connected to PortF.0. For that, I first select the internal FRC and then switch to primary oscillator with PLL. But when debugging, I found that it gets stuck in "while(OSCCONbits.COSC!= 0x03);"

Can you please check where have I made mistake? I have attached a debug screenshot showing the values of OSCCON, PLLFBD & CLKDIV registers.

Code: 
// Crytal is 24MHz.
// Configure the oscillator to operate the device at 51 MIPS using PLL
#include <stdio.h>
#include <stdlib.h>
#include <p33EP512MU810.h>
#include "clockSwitch.h"



// DSPIC33EP512MU810 Configuration Bit Settings

#include <xc.h>

// Select Internal FRC at POR
_FOSCSEL(FNOSC_FRC & IESO_OFF);
// Enable Clock Switching and Configure Primary Oscillator in HS mode
_FOSC(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMD_HS);

_FWDT(FWDTEN_OFF); // Watchdog Timer Enabled/disabled by user software

#pragma config ICS = PGD3 // ICD Communication Channel Select bits (Communicate on PGEC3 and PGED3)

int main()
{

 // Disable Watch Dog Timer
    RCONbits.SWDTEN=0;

// Configure PLL prescaler, PLL postscaler, PLL divisor
PLLFBD= 32; // M=34
CLKDIVbits.PLLPOST= 0; // N2=2
CLKDIVbits.PLLPRE= 4; // N1=6
CLKDIVbits.DOZE= 0;

// Initiate Clock Switch to Primary Oscillator with PLL (NOSC=0b011)

//OSCCON=0x301; //Oscillator Control Register
__builtin_write_OSCCONH(0x03);
__builtin_write_OSCCONL(OSCCON | 0x01);

// Wait for Clock switch to occur
while (OSCCONbits.COSC!= 3);

// Wait for PLL to lock
while (OSCCONbits.LOCK!= 1);

  
  
    
 
    TRISF=0;
   

while(1)
{
    PORTF = 0x01;
}
}
 

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what is your oscillator frequency?

the calculation I do with a dsPIC33EP256MU806 are
Code: 
// oscillator - note
// • Medium Speed Oscillator (XT Mode) is a medium gain, medium frequency mode used to work 
//              with crystal frequencies of 3.5 MHz to 10 MHz.
//• High-Speed Oscillator (HS Mode)  is a high-gain, high-frequency mode used to work 
//              with crystal frequencies of 10 MHz to 25 MHz.

// do oscillator calculations given crystal frequency and required instruction frequency

//The settings below set up the oscillator and PLL 
//follows:
//            Crystal Frequency  * (PLLDIV+2)
// Fosc =     ---------------------------------
//              (PLLPOST+2) * (PLLPRE+2) 
// FCY = Fosc/2	
//
// configuration must be _FOSCSEL(FNOSC_PRIPLL);

#define Fin  8000000UL				// crystal frequency input
#if((Fin < 3500000) || (Fin > 25000000))
	# error "Fin outside range 3.5MHz to 25MHz" 
#endif 

#define FCY 60000000			// required instruction frequency MIPs
#if(FCY > 70000000)
	# error "required instruction frequency FCY  > 70MIPs" 
#endif
#define PLLpre 2ul					// PLL prescale
//#define PLLdiv 60ul					// PLL VCO divisor
#define PLLpost	0ul					// PLL post divisor
#define PLLdiv ((FCY *2* (PLLpost+2)*(PLLpre+2))/Fin)-2

// now calculate PLL input and output
#define VCOinput  (Fin/(PLLpre+2))
#if((VCOinput < 800000ul) || (VCOinput > 8000000ul))
     #error "error VCOinput range must be .8MHz to 8MHz"
#endif 
#define VCOoutput (VCOinput*(PLLdiv+2))
#if((VCOoutput < 120000000ul) || (VCOoutput > 340000000ul))
	#error "error VCOoutput range must be 100MHz to 340MHz"
 #endif
#define Fosc (VCOoutput/(PLLpost+2))

#define SYSCLK Fosc

and then in main()
Code: 
// Setup configuration bits
_FOSCSEL(FNOSC_PRIPLL);
#if(Fin < 10000000)
_FOSC(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMD_XT);  // crystal frequencies of 3.5 MHz to 10 MHz.
#else
_FOSC(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMD_HS);  //  crystal frequencies of 10 MHz to 25 MHz.
#endif
_FWDT(FWDTEN_OFF);
_FPOR( ALTI2C1_ON);		// select aletrnate I2C1 pins for MCP79411		

	PLLFBDbits.PLLDIV=PLLdiv;
	CLKDIVbits.PLLPOST = PLLpost;		
	CLKDIVbits.PLLPRE = PLLpre;		
	OSCTUN = 0;			

    /*	Initiate Clock Switch to Primary
     *	Oscillator with PLL (NOSC= 0x3)*/
	
    __builtin_write_OSCCONH(0x03);		
	__builtin_write_OSCCONL(0x01);
	while (OSCCONbits.COSC != 0x3);       

    // Configuring the auxiliary PLL, since the primary
    // oscillator provides the source clock to the auxiliary
    // PLL, the auxiliary oscillator is disabled. Note that
    // the AUX PLL is enabled. The input 8MHz clock is divided
    // by 2, multiplied by 24 and then divided by 2. Wait till 
    // the AUX PLL locks.

    ACLKCON3 = 0x24C1;   
    ACLKDIV3 = 0x7;
    ACLKCON3bits.ENAPLL = 1;
    while(ACLKCON3bits.APLLCK != 1);
 

Thanks horace1. My crystal frequency is 24MHz. I wrote it in the first line of my code. Anyway, I did my calculations as given below. I found the formulae in the datasheet of dsPIC33EP512MU810. I'll do the calculations again as suggested by you and see what happens.

1. To execute instructions at 51 MHz, ensure that the required system clock frequency is:
FOSC = 2 x FCY = 102 MHz

2. To set up the PLL and meet the requirements of the PLL, follow these steps:

a) Select the PLL postscaler to meet the VCO output frequency requirement (120 MHz < FSYS < 340 MHz).
• Select a PLL postscaler ratio of N2 = 2
• Ensure that FSYS = (FOSC x N2) = 204 MHz

b) Select the PLL prescaler to meet the PFD input frequency requirement (0.8 MHz < FPLLI < 8.0 MHz).
• Select a PLL prescaler ratio of N1 = 6
• Ensure that FPLLI = (FIN ÷ N1) = (24 ÷ 6) = 4 MHz

c) Select the PLL feedback divisor to generate the required VCO output frequency based on the PFD input frequency.
• FSYS = FPLLI x M
• M = FSYS ÷ FPLLI = 204 ÷ 6 = 34

d) Configure the FNOSC<2:0> bits (FOSCSEL<2:0>) to select a clock source without the PLL (for example, Internal FRC) at Power-on Reset.
 

I entered your specification into my code

FCY 24000000
PLLpre 2
PLLpost 0
FCY 51000000
calculates PLLdiv = ((FCY *2* (PLLpost+2)*(PLLpre+2))/Fin)-2 = 32
VCOinput = (Fin/(PLLpre+2)) = 6000000
VCOoutput = (VCOinput*(PLLdiv+2)) = 204000000
giving Fosc = (VCOoutput/(PLLpost+2)) = 102000000

compiles with MLAB and C30 without warnings or errors
did not try to run it as my oscillator is 8MHz
 

Its not working. I think my oscillator is not working. Do you know how to check whether its good or bad? I am using a 24MHz crystal oscillator with two 27 pF capacitors.

Oh by the way, I saw in the design for dsPIC33E USB Starter Kit of Microchip (which uses dsPIC33EP512MU810) that a 1M resistor is connected in parallel to the crystal. Why is it so? Image of schematic attached.
 

Attachments

  • Crystal-res.jpg
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I would use an oscilloscope to check the oscillator
have you set the configuration correctly, e.g.
Code: 
_FOSCSEL(FNOSC_PRIPLL);
_FOSC(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMD_HS);  //  crystal frequencies of 10 MHz to 25 MHz.
can you test it with the internal oscillator?

not sure about the 1M resistor - the dsPIC board we built has one (we probably copied the USB starter kit circuit as we had one for evaluation)

it may be worth asking for help on the Microchip forum
https://www.microchip.com/forums/
 

Thanks for the info. I posted in the forum. No replies yet. Wrote to Microchip technical support. They gave me a modified code. With this code, the clock switching worked atleast in the MPLAB X simulator. In earlier codes, clock switching didn't even work with the simulator.

I have to submit my project by May last week and I am still stuck with this oscillator thing.

And yes, I tested with the FRC with no clock switching. Still not working. :-?

Latest code (working with simulator) is:

Code: 
// Crytal is 24MHz.
// Configure the oscillator to operate the device at 51 MIPS using PLL
#include <stdio.h>
#include <stdlib.h>
#include <p33EP512MU810.h>




// DSPIC33EP512MU810 Configuration Bit Settings


// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GSS = OFF                // General Segment Code-Protect bit (General Segment Code protect is disabled)
#pragma config GSSK = OFF               // General Segment Key bits (General Segment Write Protection and Code Protection is Disabled)


// FOSCSEL
#pragma config FNOSC = FRC              // Initial Oscillator Source Selection Bits (Internal Fast RC (FRC))
#pragma config IESO = OFF               // Two-speed Oscillator Start-up Enable bit (Start up with user-selected oscillator source)


// FOSC
#pragma config POSCMD = HS              // Primary Oscillator Mode Select bits (HS Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = ON             // Peripheral pin select configuration (Allow only one reconfiguration)
#pragma config FCKSM = CSECMD           // Clock Switching Mode bits (Clock switching is enabled and Fail-safe Clock Monitor is disabled)


// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = OFF              // PLL Lock Wait Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)


// FPOR
#pragma config FPWRT = PWR128           // Power-on Reset Timer Value Select bits (128ms)
#pragma config BOREN = OFF              // Brown-out Reset (BOR) Detection Enable bit (BOR is disabled)
#pragma config ALTI2C1 = OFF            // Alternate I2C pins for I2C1 (SDA1/SCK1 pins are selected as the I/O pins for I2C1)
#pragma config ALTI2C2 = OFF            // Alternate I2C pins for I2C2 (SDA2/SCK2 pins are selected as the I/O pins for I2C2)


// FICD
#pragma config ICS = PGD3               // ICD Communication Channel Select bits (Communicate on PGEC3 and PGED3)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)


// FAS
#pragma config AWRP = OFF               // Auxiliary Segment Write-protect bit (Auxiliary program memory is not write-protected)
#pragma config APL = OFF                // Auxiliary Segment Code-protect bit (Aux Flash Code protect is disabled)
#pragma config APLK = OFF               // Auxiliary Segment Key bits (Aux Flash Write Protection and Code Protection is Disabled)


int main(void)
{



// Disable Watch Dog Timer

RCONbits.SWDTEN=0;


// Configure PLL prescaler, PLL postscaler, PLL divisor
PLLFBD= 32; // M=34
CLKDIVbits.PLLPOST= 0; // N2=2
CLKDIVbits.PLLPRE= 2; // N1=6
CLKDIVbits.DOZE= 0;


// Initiate Clock Switch to Primary Oscillator with PLL (NOSC=0b011)


//OSCCON=0x301; //Oscillator Control Register


//OSCCONH Unlock Sequence
__builtin_write_OSCCONH(0x78);
__builtin_write_OSCCONH(0x9A);

//Oscillator select
__builtin_write_OSCCONH(0x03);

//OSCCONL Unlock Sequence
__builtin_write_OSCCONL(0x46);
__builtin_write_OSCCONL(0x57);


__builtin_write_OSCCONL(OSCCON | 0x01);  //turn on OSWEN
while (OSCCONbits.OSWEN); //wait until OSWEN to low

// Wait for Clock switch to occur
while (OSCCONbits.COSC!= 0b011);


// Wait for PLL to lock
while (OSCCONbits.LOCK!= 1);

TRISF=0;
while(1)
{
    PORTF = 0x01;
}
}


I started with FRC and the switched to PRIPLL because in the datasheet, its written that


For testing with the FRC only, I commented off the Configure PLL settings, switching instructions and in config settings chose POSCMD = NONE, FNOSC = FRC, IESO = OFF, FCKSM = CSDCMD. Not working.
 

Okay. I checked the whole hardware again and found that there was no continuity between the crystal oscillator and the microcontroller OSC pins. Resoldered the crystal. Now there is continuity.

Tried to run the program now WITHOUT PLL. Works both for FRC and Primary Oscillator modes. However, when I try to switch to PLL, code again gets stuck in while (OSCCONbits.COSC!= 0b001); loop.

Currently using 11.0592MHz crystal. Changed the CLKDIV/PLLFBD accordingly.
 

I loaded the following configuration in my dsPIC33EP256MU806 board
Code: 
#
_FOSCSEL(FNOSC_PRIPLL);
_FOSC(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMD_HS);  //  crystal frequencies of 10 MHz to 25 MHz.

define Fin  11059200UL				// crystal frequency input
#if((Fin < 3500000) || (Fin > 25000000))
	# error "Fin outside range 3.5MHz to 25MHz" 
#endif 

#define FCY 60000000			// required instruction frequency MIPs
#if(FCY > 70000000)
	# error "required instruction frequency FCY  > 70MIPs" 
#endif
#define PLLpre 2ul					// PLL prescale
//#define PLLdiv 60ul					// PLL VCO divisor
#define PLLpost	0ul					// PLL post divisor
#define PLLdiv ((FCY *2* (PLLpost+2)*(PLLpre+2))/Fin)-2

// now calculate PLL input and output
#define VCOinput  (Fin/(PLLpre+2))
#if((VCOinput < 800000ul) || (VCOinput > 8000000ul))
     #error "error VCOinput range must be .8MHz to 8MHz"
#endif 
#define VCOoutput (VCOinput*(PLLdiv+2))
#if((VCOoutput < 120000000ul) || (VCOoutput > 340000000ul))
	#error "error VCOoutput range must be 100MHz to 340MHz"
 #endif
#define Fosc (VCOoutput/(PLLpost+2))

#define SYSCLK Fosc

code in main()
Code: 
	PLLFBDbits.PLLDIV=PLLdiv;
	CLKDIVbits.PLLPOST = PLLpost;		
	CLKDIVbits.PLLPRE = PLLpre;		
	OSCTUN = 0;			

    /*	Initiate Clock Switch to Primary
     *	Oscillator with PLL (NOSC= 0x3)*/
	
    __builtin_write_OSCCONH(0x03);		
	__builtin_write_OSCCONL(0x01);
	while (OSCCONbits.COSC != 0x3);       

    // Configuring the auxiliary PLL, since the primary
    // oscillator provides the source clock to the auxiliary
    // PLL, the auxiliary oscillator is disabled. Note that
    // the AUX PLL is enabled. The input 8MHz clock is divided
    // by 2, multiplied by 24 and then divided by 2. Wait till 
    // the AUX PLL locks.

    ACLKCON3 = 0x24C1;   
    ACLKDIV3 = 0x7;
    ACLKCON3bits.ENAPLL = 1;
    while(ACLKCON3bits.APLLCK != 1);
compiles, loads and runs OK flashing LEDs - UART does not work as my crystal is 8MHz
 

Hey horace. I didn't understand one thing. Why did you write _FOSCSEL(FNOSC_PRIPLL); whereas what we are actually doing is running board from PRI at first and then switching to PLL.

I was trying _FOSCSEL(FNOSC_PRI);. Did not work. But when I tried _FOSCSEL(FNOSC_PRIPLL);, it worked!! :thinker:

Please enlighten me :smile:
 

in the code I entered in my first post it states that _FOSCSEL(FNOSC_PRIPLL) Primary Oscillator (XT, HS, EC) with PLL is required (to enable two speed oscillator start up), e.g.
Code: 
// oscillator - note
// • Medium Speed Oscillator (XT Mode) is a medium gain, medium frequency mode used to work 
//              with crystal frequencies of 3.5 MHz to 10 MHz.
//• High-Speed Oscillator (HS Mode)  is a high-gain, high-frequency mode used to work 
//              with crystal frequencies of 10 MHz to 25 MHz.

// do oscillator calculations given crystal frequency and required instruction frequency

//The settings below set up the oscillator and PLL 
//follows:
//            Crystal Frequency  * (PLLDIV+2)
// Fosc =     ---------------------------------
//              (PLLPOST+2) * (PLLPRE+2) 
// FCY = Fosc/2	
//
// configuration must be _FOSCSEL(FNOSC_PRIPLL);
more discussion of the oscillator in
https://ww1.microchip.com/downloads/en/DeviceDoc/70005131a.pdf

I seem to remember I copied the original code from a Microchip example
 
Last edited:

The present code which is working for me is:
Code: 
// Crytal is 24MHz.
// Configure the oscillator to operate the device at 51 MIPS using PLL
#include <stdio.h>
#include <stdlib.h>
#include <p33EP512MU810.h>


#define Fin  24000000				// crystal frequency input
#if((Fin < 3500000) || (Fin > 25000000))
	# error "Fin outside range 3.5MHz to 25MHz" 
#endif 

#define FCY 51000000			// required instruction frequency MIPs
#if(FCY > 70000000)
	# error "required instruction frequency FCY  > 70MIPs" 
#endif
#define PLLpre 2					// PLL prescale ; N1=4
#define PLLpost	0					// PLL post divisor ; N2=2
#define PLLdiv ((FCY *2* (PLLpost+2)*(PLLpre+2))/Fin)-2 // PLL VCO divisor

// now calculate PLL input and output
#define VCOinput  (Fin/(PLLpre+2))
#if((VCOinput < 800000) || (VCOinput > 8000000))
     #error "error VCOinput range must be .8MHz to 8MHz"
#endif 
#define VCOoutput (VCOinput*(PLLdiv+2))
#if((VCOoutput < 120000000) || (VCOoutput > 340000000))
	#error "error VCOoutput range must be 120MHz to 340MHz"
#endif
#define Fosc (VCOoutput/(PLLpost+2))

#define SYSCLK Fosc

// DSPIC33EP512MU810 Configuration Bit Settings


// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GSS = OFF                // General Segment Code-Protect bit (General Segment Code protect is disabled)
#pragma config GSSK = OFF               // General Segment Key bits (General Segment Write Protection and Code Protection is Disabled)


// FOSCSEL
#pragma config FNOSC = PRIPLL           // Initial Oscillator Source Selection Bits (Primary Oscillator (XT, HS, EC) with PLL)
#pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)


// FOSC
#pragma config POSCMD = HS              // Primary Oscillator Mode Select bits (HS Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD           // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled)


// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = OFF              // PLL Lock Wait Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)


// FPOR
#pragma config FPWRT = PWR128           // Power-on Reset Timer Value Select bits (128ms)
#pragma config BOREN = OFF              // Brown-out Reset (BOR) Detection Enable bit (BOR is disabled)
#pragma config ALTI2C1 = OFF            // Alternate I2C pins for I2C1 (SDA1/SCK1 pins are selected as the I/O pins for I2C1)
#pragma config ALTI2C2 = OFF            // Alternate I2C pins for I2C2 (SDA2/SCK2 pins are selected as the I/O pins for I2C2)


// FICD
#pragma config ICS = PGD3               // ICD Communication Channel Select bits (Communicate on PGEC3 and PGED3)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)


// FAS
#pragma config AWRP = OFF               // Auxiliary Segment Write-protect bit (Auxiliary program memory is not write-protected)
#pragma config APL = OFF                // Auxiliary Segment Code-protect bit (Aux Flash Code protect is disabled)
#pragma config APLK = OFF               // Auxiliary Segment Key bits (Aux Flash Write Protection and Code Protection is Disabled)



int main(void)
{

// Disable Watch Dog Timer
RCONbits.SWDTEN=0;

TRISF=0;

// Configure PLL prescaler, PLL postscaler, PLL divisor
PLLFBDbits.PLLDIV=PLLdiv;
CLKDIVbits.PLLPOST = PLLpost;
CLKDIVbits.PLLPRE = PLLpre;
CLKDIVbits.DOZE= 0;


// Initiate Clock Switch to Primary Oscillator with PLL (NOSC=0b011)

//Oscillator select
__builtin_write_OSCCONH(0x03);

// Clock Switch
__builtin_write_OSCCONL(OSCCON | 0x01);  //turn on OSWEN

while (OSCCONbits.OSWEN); //wait until OSWEN to low

// Wait for Clock switch to occur
while (OSCCONbits.COSC!= 0b011);


// Wait for PLL to lock
while (OSCCONbits.LOCK!= 1);


/* Set PWM Period on Primary Time Base */
PTPER = 4000;

/* Set Phase Shift */
PHASE1 = 4000;
SPHASE1 = 2000;
PHASE2 = 1000;
SPHASE2 = 3000;

/* Set Duty Cycles */
MDC = 2000;

/* Set Dead Time Values */
DTR1 = DTR2 = 0;
ALTDTR1 = ALTDTR2 = 0;

/* Set PWM Mode to Independent */
IOCON1 = IOCON2 = 0xCC00;

/* Set Primary Time Base, Edge-Aligned Mode and Master Duty Cycles */
PWMCON1 = PWMCON2 = 0x0100;

/* Configure Faults */
FCLCON1 = FCLCON2 = 0x0003;

/* 1:1 Prescaler */
PTCON2 = 0x0000;

while(1)
{

/* Enable PWM Module */
PTCON = 0x8000;

PORTFbits.RF0 = 1;

}
}

LED connected at RF0 is ON and I get PWM signal at PWM1H, 1L, 2H, 2L.

By the way, I have disabled the Auxiliary oscillator.

Thanks a lot.
 

nairitb said:
The present code which is working for me is:

LED connected at RF0 is ON and I get PWM signal at PWM1H, 1L, 2H, 2L.

By the way, I have disabled the Auxiliary oscillator.

Thanks a lot.
Click to expand...
good to hear it is working - I seem to remember that I required the auxiliary oscillator to drive the USB interface to talk to the host PC
 

I also have provision for USB. Plan to use it later.
 

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