You can generate a fill at the end of the design which will add metal wherever it can, (use nofill to to stop it filling areas you don't want covered oin metal.
hi,
According to the process you are following ,and the technology u r using .There generally fab rules which states that for certain area exceeding ,depending on metal layers allowed ,there rules which constrain the density of metals allowed.so to avoid we use dummy metal fill pattern ,generally this is done at top level only.
Regards,
Roy
when is drawn subcircuit she is not filled additional layers . this error skip. when whole crystal ready, then script are filled empty area. and this not only metals, all depend on technological process. it may be ACTIVE, DIFF, .....
Typically, the mim metal density rules will have to do process control for metal pattern etch. In this case, if the metal pattern density doesn't match criteria 0f 30%, there is the risk some metal inside the circuit somewhere else will be over-etched, let's say the possibility might happen at the area where the metal density is lower in respect to other area in the circuit.
Solution will be adding the dummy metal pattern in the metal layer which violated the rule.
If ignoring the rule, there would be yield maintenance issue depending on the process control capability of the fab you use.
As long as its not the full chip layout that you are doing, you can safely ignore the error for the time being..
Metal Density errors are for DFM which are generally taken care of in the top layout by putting dummies.
-->The exact name of the layer "NOFILL" is NOFILL.
This depends on the design kit you are using. if you can't find the layer "NOFILL", you should probably go and check your design rules and/or PDK documentation. It'll tell you what layer name corresponds to this "NOFILL" layer.