DRC error for MIMCAP in UMC-65nm pdk

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im_pam

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Dear all,
this is firsttime i am using the MIM CAP ( 20f_mm) . when i am making its connection in the layout using the callibre tool (in cadence virtuoso). i have got very bad error. Can anyone give suggestion to remove these error. Image attach for the reference
 

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As with every DRC violation, you check the design rule manual and compare against your layout. You got some M7/V7 enclosure wrong.
 

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