But some fnds told me that the Reason of STI ( shallow trench isolation ) we can't merge that source and drain of series transistor in analog part except matching consideration .In digital part of transistor we can do right ? ( rail to rail ). please fnds suggest me ...
sorry mr.keith,just i called friends (shortly fnds )
Actually analog part transistors got some effect during STI . but if not merged ,the source and drain cap has increasing for every single device ..that s why i need to know whether i need we can merge or not ?
Do you think of an STI separation problem similar like that described below?
(Here a possible STI separation between source & bulk tap is considered).
In this case you just have to care that no STI is between the active areas to be merged by appropriate layout, i.e. using a common active area for both drain and source of the stacked transistors.
Both transistors, however, own the same bulk tap, i.e. their threshold voltages will differ.