aapirzado
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Hi all,
For a Double Gate MOSFET, the width b/w 2 gates is known as Wsi. If I increase Wsi from 20 nanometers(nm) to 40, the gate loses control over channel and I can not deplete the device.It is logical to think, as the distance b/w 2 gates (Wsi) increases, it is harder for the gate to maintain control in the center of the channel (farthest from either gate). the gate loses the control over center of the channel.
can anyone help me explain this relationship in an analytical or physical way?
http://obrazki.elektroda.pl/4_1305728746.gif
For a Double Gate MOSFET, the width b/w 2 gates is known as Wsi. If I increase Wsi from 20 nanometers(nm) to 40, the gate loses control over channel and I can not deplete the device.It is logical to think, as the distance b/w 2 gates (Wsi) increases, it is harder for the gate to maintain control in the center of the channel (farthest from either gate). the gate loses the control over center of the channel.
can anyone help me explain this relationship in an analytical or physical way?
http://obrazki.elektroda.pl/4_1305728746.gif
