Does this bandgap type need start up circuit??

[janet]

start-up circuit

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Added after 28 minutes:

the op is biased by self bias source.
if the circuit exits zero current solution, then for the OP,VIN=VIP=0,VOUT=VDD,which I think is impossible.
I also gvie it a slow ramp VDD, and the circuit behaves the same with or without start up circuit.

 

[saro_k_82]

start up circuit

It requires start-up circuit for sure.
Why cant the opamp output be at VCC when both inputs at ground? To test it, you need to initialize all the nodes such that there is zero current in the loop and run the sim at slow & cold case. Then add offsets to see if it works. In these circuits, most of the times it is the fast supply ramp that prevents it from working. A monte-carlo sim can also be run to show the need for startup.
At low currents, the re (1/gm) will be much higher than the dVbe resistor, so there will be little to choose between positive and negative feedback, a small offset is enough to see the positive feedback reign.

 

[janet]

bandgap startup

Why cant the opamp output be at VCC when both inputs at ground?

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But if I input zero in both sides of OP, the output is not VDD.

I understand your sim method as this,right?:

1. sim at ss coner & low temperatue(why not high tenperature but low temperature? )

2 add offset in circuit(is the offset both in OP and current mirror? and how much do you add?)

3 give a fast ramp VDD

4 run montecarlo (may I take this as adding offset in circuit?)

 

[saro_k_82]

site:edaboard.com low temperature start up

The opamp output can easily sit at VDD when both the inputs are zero., It doesnt happen in some simulation test cases you have provided does not mean that it can't happen at all.
I just listed out a few cases where it is easy to catch a start-up problem. If you are still not able to see a startup problem., it is your inability to set up a test case to observe it rather than the circuit's ability to work in all cases without a startup.
If you have an enable/off/power-down port for this reference, make that signal enable the circuit after it was stable in the off state for a while (with a stable VDD). In slow, cold and with offsets you should see your circuit failing.

 

[janet]

bandgap startup

Do you mean first I disable BG circuit to make the zero current state,then I enable it to see whether it can jump to it's normal state??

why offset can help it stay in zero current state?I donot quite understand?

 

[saro_k_82]

bandgap circuit startup problems

Refer these


and

 

[janet]

how does a bandgap work

thanks for your help

 

[ashish_chauhan]

startup circuit for low offset opamp

I agree with Saro_k_82 on his last mail...

The method of stablizing the vdd and triggering the enable/disable pin almost always work. I myself caught the start-up problem in my k-gm bias circuit this way.

dealing with offset yes it can put you in zero current state forever or even turn your band-gap into an oscillator!! someting which you can realize in simulations as well ( better you do it in sims, instead of facing it on silicon and wondering why!!)