Does this avoid the creation of a latch

Status
Not open for further replies.
S

streetHawkk

Newbie level 5
Joined
May 14, 2012
Messages
8
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,359
Hi Friends,

I have a scenario where i want to increment b only for a certain condition of a. Will the below code create a latch. Is this a good way to avoid creation of a latch for such a scenario.
Please comment.

Code VHDL - [expand]
1
2
3
4
5
6
7
8
9
10

b_proc: process(clk)
begin
    if(clk'event and clk='1') then
        if(a > 1) then
            b <= b+1;
        else
            b <= b
        end if;
    end if;
end process;
 

What you've got there is a register (FF). I'm not sure why you are worried about creating a latch-you can't have both a latch and a ff at the same time. Latches are inadvertently created (usually) when you have a non-clocked process. One of the reasons you want to avoid creating a latch is that it uses a flip-flop that you might not really need or want.

Here's a latch:

Code: 
process(en,d)
begin
       if en='1' then
              q<=d;
       end if;
end process;
 

Thanks for the response, In my project, i have quite a few case i showed in my previous post and Xilinx synthesis tool gives me lots of warning about latch being used which it says is not recommended, I am bit worried about these warnings. So what i wanted to confirm is for such cases will the ff serve my purpose. Is it better to have my else part for all such situations by assigning the same signal to itself like b <= b to prevent from creating a latch.
Code VHDL - [expand]
1
2
3

else
     b <= b  -- will this work?
end if;
 

I don't know about all tools, but I know that Synopsys will flag that "else b<=b" statement as unnecessary. Still, I tend to put it in just for completeness; it won't hurt anything.
 

Latch inference warnings usually come from code like barry's. Are you sure the warnings refer to the code you posted in your first post? could it be from a 2 process state machine (which a synchronous and asynchronous process). I have NEVER seen warnings from good code (like that in your first post).

So I suspect you have dodgy code somewhere.
 

Is it better to have my else part for all such situations by assigning the same signal to itself like b <= b to prevent from creating a latch.
Click to expand...
else b<=b in asynchronous code can't prevent latch inference, else b<=0 can.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…