Does synchronization guarantee a design without Hazards and Races ?

[sheikh]

Hello Dears
Does synchronization guarantee a design from Hazards and Races ? ( I mean eliminate them completely)
Regards
Mostafa

 

[Prashanth.vinnakota]

Re: synchronise a Design

Synchronisation of a circuit does not eliminate hazards and races completely.

We need to take care of Clock Distribution Network(Clock Skew Analysis) considering the propagation delays in the circuitry.

These issues are discussed in the well known topic namely "STATIC TIMING ANALYSIS"

 

[mrflibble]

Re: synchronise a Design

Well. If you want to completely eliminate hazards and races, you had better avoid overly spicy food.

And on a more serious note: no amount of synchronization is going to protect a design from hazards. I mean if you bombard your fpga with ionizing radiation, good luck synchronizing that away. Race conditions however ... Lets take the extreme case of synchronization and put the entire design in a single clock domain. Lets further assume it's a nice and slow clock. In that case I can't think of any race conditions that cannot be avoided (because yes obviously I can think of pathological examples that cause race conditions ).

 

[jeffrey samuel]

Re: synchronise a Design

sync just matches the two and does not provide a way for eliminating hazards

 

[zalmonox]

Re: synchronise a Design

Hello Mostafa.
Sync design: is a necessary but not sufficient condition for a successful dig. design. If you want to sleep well you should follow the strict rules of sync. designs -- proper clock-domain crossing, proper counter meta-stability design and all the nice stuff.
Concerning the hazard/races in between two flops working on the same clock there will be no issue. However, if a highly ionized particle will hit your FPGA/ASIC in the bad place (that's 1e-xx probability but still not null!) you won't be free from hazards.

 

[sheikh]

Re: synchronise a Design

Synchronisation of a circuit does not eliminate hazards and races completely.

We need to take care of Clock Distribution Network(Clock Skew Analysis) considering the propagation delays in the circuitry.

These issues are discussed in the well known topic namely "STATIC TIMING ANALYSIS"

Thanks Prashanth.vinnakota

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Hello Mostafa.
Sync design: is a necessary but not sufficient condition for a successful dig

Thanks a lot dear Zalmonox

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Well. If you want to completely eliminate hazards and races, you had better avoid overly spicy food.

And on a more serious note: no amount of synchronization

Dear mrflibble thanks, useful and funny

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Well it seems that we need to isolate our design by a Lead (Plumbum) tube, then try to eliminate Hazards