There's probably layers of stuff that need changed.
The symbol libraries that are process-specific, will
have associated netlisting procedures per device
that will refer to corresponding models. Those
names and arguments will need to be mapped or
replaced (the PDK models set's subcircuit layer may
be the efficient place to do this). SPICE "not found"
model errors will show you what's "got a gap", you
can expect a few passes around that loop getting
the schematic, symbol, netlist line, model libs and
model statement detail all self-consistent.
When you get all that straight then you can observe
any effects of process and gemoetry (if the model
fit of one, is appropriate to the geometries of the
other).