hi all
i am searching for some circuits to generate a dither signal for a delta-sigma ADC. i saw a circuit that used some not in ladder form and then use the last output as the input(cmos mixed signal circuit design, by jacob baker; vol-2; page 99). but when i simulate it with hspice, it doesn't work. any idea?
is there any good reference about circuits (not blocks) of generating dither noise for ADCs?
thanks
A good dither is not always a simple thing to do. If you want a tone-free 1st order sigma delta loop, applying right dither is a real art.
Second order modulator dithering is much easier. Third and higher orders are often sufficiently dithered by their device noise.
What kind of sigma-delta loop do you use?
Look ofr the yellow sd book (Norsworthy, Schreier, Temes, ....). Chapter 3 deals with idle tones and dithering. If you use your sd for audio application, you have to know how to detect idle tones and than find a good dither generator. I prefer dynamic dithering.
Yeah, dynamic dithering is good enough for low-end audio or voice.
Otherwise, just apply a white noise with sufficiently large amplitude to quantizer. One example of digital white noise source is given in Horowitz and Hill, Art of Electronics.
For 2nd-order sdm you are going to lose 10-15db of SNR if you want good signal suitable for high-end audio.