Distortion Analysis - IICP and IIP3 degradation

Distortion Analysis

Hi Guys;

I am designing an LNA that has two stages. operating frequency is 2GHz.

I have a problem with adding the second stage. First stage is common source, and second stage is common source too. It means that I am amplifiying input voltage by cascading the two common source stage.

However, when I connect the second stage, linearity of the LNA is degrading so much.

I am trying the understand the nonlinear behaviour of the second stage.

the linearity of an amplifing stage depends on:

source resistance (or loading effect of the previous stage)
load resistance
biasing
headroom of the transistor

This is really interesting that 1dB input intercept point degrading dramaticly. (Not only IICP but also IIP3 etc.. Are there any reason why is cascading degrading the linearity or can something be wrong?

Perhaps, I am not wrong, in FET devices the input impedance at the gate is very high (in the order of MegaOhms) so when you plug the drain of 1st stage at the gate of 2nd one you get "loaded" by it as yourself mentioned. At this point, as it is like trans-impedance device the main characteristics are changed.

You could add additional info of your transistor, perhaps if it's available the non-linear model we can introduce it at simulator and share some results with others.

BR.

One thing you did not account for was the Power going in to the
second LNA(or Amp). Are you making sure that the second amp is not
being over driven? That will kill your IP3. Also are you interstage matching
or is the output of amp1 being matched to 50Ω then matching to Amp2?

Did you match the amps for lowest noise, max gain, Max Pout,or wideband .... ?
Did you simulate the S-parameters?

Actually, I am trying to design two stage LNA in order to get high gain. Then I will apply feedback for input matching and also this will improve my linearity. Therefore,

should I check the linearity of the LNA in open loop before applying feedback? How much may I expect linearity performance from LNA. if loop gain is high in the operating band then linearity will be improved by feedback.

maximum input signal is -25dBm. I was a bit confused about it.

uzay1983 said:

Actually, I am trying to design two stage LNA in order to get high gain. Then I will apply feedback for input matching and also this will improve my linearity. Therefore,

should I check the linearity of the LNA in open loop before applying feedback? How much may I expect linearity performance from LNA. if loop gain is high in the operating band then linearity will be improved by feedback.

maximum input signal is -25dBm. I was a bit confused about it.

Click to expand...

1. LNA is always used as frond-end equipment where signal level is not high enough
to push amplifier to non-linear region.
2. For LNA, when you will design Inter-Stage matching network, It will demand a
Trade-off between Noise matching and Gain because inter-stage matching will be
noise matching for 2nd stage and gain matching for Ist stage. When you will try to
achieve gain flatness from this kind of design, Gain flatness will be achieved at
expanse of NF; of course Noise matching for 2nd stage will be disturbed.
3. Without Non-linear model of transistor, you can not proceed to Non-linear analysis which are seldom easily available.

If you check the formula for cascaded amplifiers having particular IP3's, you will see that always adding stages to an amplifier the overall IP3 degrades.

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