[SOLVED] Distance between MCU-Phy-Magnetics-RJ45

[amirke]

Hi,

I want to designt a fast ethernet line (1 Gigabit)
My SOC (xilinx Zynq) has to be connected to a PHY then to magnetics and finally to a RJ45 connector

SOC-------------PHY-----------Magnetics---------RJ45
|---distance 1---|---distance 2---|---distance 3---|

I know that thumb rule talks about 25 mm of distance between each component

But I need to place the RJ45 connector far 50-100cm from the SOC.

So what is the recommendation for all the distances between the components (PHY, Magnetics, RJ45) ?
max distance 1 = ?
max distance 2 = ?
max distance 3 = ?

Thanks

 

[FvM]

You have to check impedance matching and termination for each connection. Ethernet is usually terminated at the PHY, in this case, there are no restrictions for PHY to magnetics or magnetics to JJ45 connections, except for common mode EMI considerations. SOC to PHY depends on the interface standard and trace impedance. If correctly terminated, it can be extended to a few 10 cm without problems.

 

[amirke]

Thanks FvM,

So assumingly that all traces are terminated correctly and controlled impedances,
The,
max distance 1 < 10cm
max distance 2 = no restriction
max distance 3 = no restriction

Correct?
Can you point me to a good article / application note ?

 

[amirke]

And one more question :
Why the DISTANCES between the PHY and the magnetics needs to be AT LEAST 1 inch ?

Thanks

 

[FvM]

Where do you see this specification?

 

[amirke]

In PULSE - Layout Considerations for Pulse Ethernet Magnetics and Ethernet Connector Modules note it says:
"For EMI consideration, this distance must be
25mm (approx. 1 inch) or greater for both
discrete and integrated magnetics."


http://www.networking.pulseelectron...lse_Layout Considerations v7.pdf?hsLang=en-us

 

[KlausST]

Hi,

so the paper already gives the answer to the question: It´s to reduce EMI.

Now I don´t have the HF knowledge to verify this statement. So what can I do?
* accept it and design the circuit according the paper
* or avoid it, by using magnetically shielded RJ45 connectors with built in tranformer.

Klaus

 

[FvM]

The Pulse application text is an undeclared quote from an SMSC/Microchip application note. https://ww1.microchip.com/downloads/en/Appnotes/en562748.pdf

If distance actually creates common mode isolation depends on the common mode trace impedance. It may help in some cases. SMSC PHY chips are known to have common mode interference issues, I'm not sure if we can generalize it.

 

[marce]

Its is 25mm OR LESS between the magnetic's and the RJ45 connector...
It is 25mm OR GREATER between the Magnetic's and the PHY

This is mentioned in numerous data sheets and application notes...
The distance is to avoid the magnetic fields of the transformers influencing the Phy.