discrete synthesizer vs ic synthesizer

I was told that a radio receiver will have better RF noise performance if built with the proper discrete components vs a radio receiver made with one ic components.

I want to prove this thoery.

I have a ic radio reciever(CC1101) with a built in pll and I would like to compare its performance to a discrete pll (ADF4154-freq. syth., loop filter,discreteVCO, discrete osc).

I attached the data sheet of both the discrete part and the ic part. I cant tell from the data which device has better RF performance from the pll standpoint. I was hoping someone can help me figure this out.

Or is my request futile? Please help.......

It appears to me that you have been misinformed, but to be sure...what type of modulaton and data rate were you planning to use with this CC1101? Any unusual environmental conditions, such as high mechanical vibration?

biff44 said:

It appears to me that you have been misinformed, but to be sure...what type of modulaton and data rate were you planning to use with this CC1101? Any unusual environmental conditions, such as high mechanical vibration?

Click to expand...

FSK modulation and 500Kbaud, no unusual environmental condition.

I think your statement is generally correct (discrete vs integrated), but it is not a theory, is just the result of one obvious fact: using a discrete approach one can choose the best technology for each sub-system. But the drawback is an increased cost and space.

Performances are requested by applications and semiconductor companies find the best compromise between integration level and cost (is a really more complex argument, but I don't have enough space here, so I have summarized...).

So, the PLL you mention is for basestations and adjacent channel rejection in these systems is MANY dB higher than short range communication systems (like the CC1101), and the two PLLs are really different in term of noise.

But performance is not only noise, is also speed. Note that the delta sigma frac PLL of Chicon has 10 times the bandwidth of frac N ADI one, so settling time of the IC is much less. What about the general statement?


Hope it can help.

Mazz