first the question itself is not clear.
1. There are many mature digital EDA tools as compaired to analog, for example if we take a some vhdl compiler and spice compiler , it will be observed that the spice simulation of same design, will take a more time as cmprd to that of vhdl one. so while designing the VLSi or even deeper designs, going to spice level is extremely difficult....
2. future designscope for Digital design is removing the clock i.e. asynchronous circuits...though there are many clockless designs but there is no commercioal tool is avliable for such desieg,,so there is need of such tool