Digital noise filter

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depanwita

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I need to design DNF(Digital Noise Filter) using VHDL, which is able to eliminate glitches by calculating pulse width. that is is a pulse width is less than a specified value it will not come in output but if more than specified value it will come in output. for pulsewidth calculation I am using this following code 
Code VHDL - [expand]
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library IEEE;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity Pulse_Measure is
   generic
      (
      Pulse_Measure_Polarity : STD_ULOGIC := '1' -- 0=Measure Low Time 1=Measure High Time
      );
   port
      (
      i_Rst                : in STD_ULOGIC; -- Active high reset
      i_Clk                : in STD_ULOGIC; -- Measurement Clock
      i_Pulse              : in STD_ULOGIC; -- Pulse to be measured
      -- 
      o_Pulse_Width        : out UNSIGNED(15 downto 0); -- Measurement
      o_Overflow           : out STD_ULOGIC; -- Overflow flag
      o_Measurement_Valid  : out BOOLEAN; -- True if measurement was successful
      Pulse_out : out STD_ULOGIC);
   
end Pulse_Measure;
 
architecture arc_Pulse_Measure of Pulse_Measure is
   
   signal Pulse         : STD_ULOGIC;
   signal Pulse_Counter : UNSIGNED(15 downto 0);
   signal Pulse_Count   : UNSIGNED(15 downto 0);
   signal Overflow      : STD_ULOGIC;
   signal Measurement_Valid : BOOLEAN;
   
   type state is
   (
   s_Reset,
   s_Signal_Inactive,
   s_Counting,
   s_Done
   );
   
   signal Measurement_State : state;
   
begin
   
   -- Set polarity so that "Pulse" is always high for measurement
   Pulse <= i_Pulse xor not Pulse_Measure_Polarity; 
   
   process(i_Rst,i_Clk)
   begin
      if i_Rst = '1' then
         Pulse_Counter      <= X"0000";
         Pulse_Count        <= X"0000";
         Overflow           <= '0';
         Measurement_Valid  <= FALSE;
         Measurement_State  <= s_Reset;
      elsif rising_edge(i_Clk) then
         case Measurement_State is
            when s_Reset =>
               -- Wait here for signal to become inactive so we don't measure a partial pulse
               if Pulse = '0' then
                  Measurement_State  <= s_Signal_Inactive;
               else
                  null; -- Stay here
               end if;
            
            when s_Signal_Inactive =>
               if Pulse = '1' then
                  Pulse_Counter <= Pulse_Counter + 1; -- Start counting here
                  Measurement_State  <= s_Counting;
               else -- Pulse = '0'
                  Pulse_Counter <= X"0000"; -- Hold cleared while not in use
               end if;
            
            when s_Counting =>
               if Pulse = '1' then
                  -- Actively counting
                  if Pulse_Counter = X"FFFF" then
                     -- We have overflowed the count
                     Overflow           <= '1'; -- Set flag
                     Measurement_Valid  <= False; -- Clear Flag
                     Measurement_State  <= s_Reset; -- Start over
                  else
                     Pulse_Counter <= Pulse_Counter + 1; -- All is good, keep counting
                  end if;
               else --Pulse = '0' -- Pulse is over
                  Measurement_State  <= s_Done;
               end if;
            
            when s_Done =>
               Pulse_Count <= Pulse_Counter; -- Capture count
               Measurement_Valid  <= TRUE; -- Set Flag
               Measurement_State  <= s_Reset; -- And return to start
                    if(Pulse_Counter< 5) then
                        Pulse_out <= i_Pulse;
                    else 
                        Pulse_out <= '0';
                    end if;
            when others => null;
            
         end case;
      end if;
      
      -- Connect signals to output pins.
      o_Pulse_Width        <= Pulse_Count;
      o_Overflow           <= Overflow;
      o_Measurement_Valid  <= Measurement_Valid;
      
   end process;
   
end arc_Pulse_Measure;


here the pulse width is coming properly but not getting the proper noise eliminated output.
Please I need urgent help for this
 
Last edited by a moderator:

yes. I MADE A VERILOG test bench

Code Verilog - [expand]
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`timescale 1ns / 1ps
 
////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:   16:47:11 03/12/2015
// Design Name:   Pulse_Measure
// Module Name:   G:/DNF design/DNF/Pulse_measuretest3.v
// Project Name:  DNF
// Target Device:  
// Tool versions:  
// Description: 
//
// Verilog Test Fixture created by ISE for module: Pulse_Measure
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////
 
module Pulse_measuretest3;
 
    // Inputs
    reg i_Rst;
    reg i_Clk;
    reg i_Pulse;
 
    // Outputs
    wire [15:0] o_Pulse_Width;
    wire o_Overflow;
    wire o_Measurement_Valid;
    wire Pulse_out;
 
    // Instantiate the Unit Under Test (UUT)
    Pulse_Measure uut (
        .i_Rst(i_Rst), 
        .i_Clk(i_Clk), 
        .i_Pulse(i_Pulse), 
        .o_Pulse_Width(o_Pulse_Width), 
        .o_Overflow(o_Overflow), 
        .o_Measurement_Valid(o_Measurement_Valid), 
        .Pulse_out(Pulse_out)
    );
 
    initial begin
        // Initialize Inputs
        
        i_Clk = 0;
        forever #5i_Clk = ~i_Clk;
        end
        
        initial begin
        
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #100;
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #100;
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #100;
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #100;
        
        
        
        
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #80;
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #80;
        
          i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #100;
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #200;
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #80;
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #100;
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #100;
        
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #50;
        
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #50;
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #50;
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #50;
        
        i_Rst = 0;
        i_Pulse = 0;
 
        // Wait 100 ns for global reset to finish
        #200;
        
        i_Rst = 0;
        i_Pulse = 1;
 
        // Wait 100 ns for global reset to finish
        #200;
        // Add stimulus here
 
    end
      
endmodule
 
Last edited by a moderator:

You only change Pulse_out at the end of the incoming pulse.
If you only get pulses with the specified length, Pulse_out will stay '1' forever.

I agree with TrickyDicky, you should use a test bench.
 

Can you please suggest how I can get the output noise free pulse.

I will also be thankful if you can provide different code for this desired algorithm of digital noise filter
 

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