Ok, let's try it the brute force way. You'll need 6 counters, 6 decoders/drivers, and a 6 digit, 7 segment display or 6 individual displays. Add a 1 Hz gate clock, some latches between the counters and decoders/drivers and maybe an input amplifier (depending on your source).
Now for the next level of details. The 6 counters need to be hooked together using their carry bits to form a single 6 digit counter. Depending on what kind of counters (ripple or parallel) the carry bits will need to be hooked up differently. There are diagrams on the net for that. The 1Hz can be derived from a watch crystal and a couple of cmos logic inverters to make an 32768Hz oscillator. Divide that by 2^15 to get 1Hz. That 1Hz clock will need some additional logic to create signals to latch the count and clear the counters on each 1Hz cycle.
Some other notes. The decoder/drivers need to match the display type, common cathode or common anode and you'll need current limiting resistors. You'll need to be consistant about the logic levels if you use different logic families require HC, HCT, etc. And you'll need some sort of power supply.
That's about it for the gross details. I hope I have provided a useful overview and some direction. There are other approaches, more integrated ICs, using microprocessors for display and control, increased or decreased resolution but without more specific design requirements the book is wide open.
Ray