These different views represent different aspects of the
cell. Some contain connectivity (schematic), some physical
design (layout), some are just netlisting views for other
simulators. spectre view is one of these, tells the netlister
to stop there and call out a model & pins.
You want to have a spectre view for each lowest-level
primitive. But the circuit will still be simulated from the
schematic or config view (depending on whether you
have a need to manipulate in detail, the hierarchy and
alternate simulation views such as veriloga (with an
associated .va code file) or av_analog_extracted (from
layout, with parasitics).