A to Ds work by comparing the incoming analogue with a known step. say you have an eight A to D with a range of 0 -> 5V, then each step will be 5 / 2^8 = 5/256 ~ 20 mV. If your incoming analogue signal is less then 20 mV, the A/D will remain stubbornly at 00000000!, a 45 mV signal would give you 00000010. So it is important that your analogue signal uses the whole range of the A/D. So if the maximum analogue is expected to be say 100 mV, then you need an analogue amplifier to raise this to the 5v = gain of 50.
The minimum sampling frequency is twice the maximum incoming frequency, this is a theoretical figure and it should be be greater to stop errors. Imagine a 1 HZ sine wave, If you sample it at twice the one HZ (2 HZ), You measure exactly at the peaks, so your sample gives you, +v, -v, +v, -v. .. This looks OK. Suppose the incoming frequency is raised to 2 HZ, when sampled at 2HZ, will give you +v, +v, +v, +v. . Which means that your A/D is reading the incoming AC as DC. !!.
You must precede the A/D with an anti-aliasing filter to stop this effect, this is a filter that limits the high frequency signal input to the A/D. This filter obviously limits the bandwidth of the response of the A/D, so select your maximum frequency that you want to measure, design the filter with a cut off slightly higher, say +20% to allow for the filter not being perfect. So now you have your 1 HZ bandwidth and you want to be able to measure at 4000 places during its one cycle (1000 up to positive peak, thousand down to zero, same for negative peak) , this then gives you a sampling speed of 4000 in a second so each one must be every 250 microseconds. If you use a better A/D, say 14 bit, then the sampling speed must be that much higher.
Can you see that what with an analogue amplifier front end, followed by an anti aliasing filter, you have virtually built what you want?
Frank