Difference btw Back end and Front end in VLSI

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shivapugal

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what is meant front end in vlsi

Hi all,

Im an vlsi student

I searched in the net but i couldn't get the exact difference between Back end and Front end methodology in VlSI and ASIC design flow.

i feel it was much differ from pcb layout back and front end design.

can anyone clear me this.

1) why after doing the back end we need programing in vhdl. will we code the pgm in the chip.

2) we design only the core in the back end then how will we connect the core to the chip package?

pls clear me this.

Thanks in advance
Shiva.
 

back end and front end

Hi Shiva,

With respect to Digital Design the flow goes this way.

RTL coding (Verilog or VHDL)
Synthesis
Floorplanning/PowerPlanning
Placement
Clock routing
Routing
Physical Verification(LVS/DRC)

RTL Coding+ Synthesis ------> Front End
Synthesis+ Floorplanning to Physical Verification -------- Backend

Synthesis can be a part of front end or Backend which can be carried out by either frontend engineer or Backend engineer.

RTL coding engineer called frontend engineer
Reminaing steps who carry out called Physical design Engineer or Backend Engineer.

Hopes this helps

For more information on ASIC flow you can search on this forum you will get lot of material.

Regards
 
difference between frontend and backend

Hi arjun,

Thank u for your quick response.

two more question

will the back end designed according to the rtl coding?

after the coding will we fuse the code into the chip or just the back end is designed according to the rtl coding same like schematic and pcb designing??

Thanks
Shiva.
 
front end and back end design in vlsis

Hi Shiva,

Once you have done with RTL coding, either you can go with FPGA or Semi-custom(the one which explained earlier) depending upon your requirement.

To answer your question.

>>will the back end designed according to the rtl coding?
There is no as such backend designed according to the RTL coding.

I suggest you to read some good book on ASIC Digital Design which will take you the actual design flow and also clarify lots of your doubts.

Good luck

Regards,
 
front end and back end tools in vlsi


There is no programming in VHDL after the backend
The VHDL code is just a description for the design that will be put on the chip

The Front End starts in the RTL design (VHDL or Verilog), and includes Functional Verification (Simulation, Formal Verification, etc), and in some cases Logical Synthesis which can also be a part of the Back End flow!
 
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