Device model parameter extraction for a new technology

Hi guys,

I am very new to this topic, so I would like to know what is the standard procedure for extracting the parameters of a compact model that describes the behaviour of a MOS-like devices?

Supposing to have:
-Few sample wafers with devices from a very new technology, with different L, W, W/L,...
-The mathematical formulation of Id as a function of a lot of parameters
-Instruments like probe station, semiconductor parameter analyzer, spectrum analyzer, ...
and that I have to put all the parameters into a verilog-A file for simulation in Cadence Virtuoso.

I tried to google it but apparently there is not so much about this topic, so if someone of you knows how to do it I will be very glad to receive suggestions, link to tutorial/handbook, books to start from the ground up.

Thank you a lot!

PS: My objective is to collect these parameters in order to design analog circuits with this technology, not the characterization itself

Try to get more info about the IC-CAP Device Modeling Software from Keysight. AFAIR it's the most-used device parameter extraction program in semiconductor industry.

Than best for you is to look for a relatively older process model library. Do an online search and you will get that. All the text books on analog circuit design should have that also

khabib said:

All the text books on analog circuit design should have that also

Click to expand...

Thank you. I studied on some books on analog IC design, mostly on Razavi and Baker, or device physics on Sze and Colinge, but they explain more on the physics of MOSFET and how to get to the equations for current than on the extraction of parameter for a given technology.
I have also the Gray-Mayer and Allen books, but I've never read that part.

Could be that this kind procedures are strictly related to the model itself?
I mean that, instead of searching for general ideas and concepts, I should take the mathematical formulation for the drain current, and try to find the way to process the acquired data of Id(Vds) and Id(Vgs) in order to extract the DC parameters, for example.

Does it make sense?

If you want to do device parameter extraction for taking a job as a device modeling engineer( which I have been doing for 15 years) than get a book like Tsividus MOSFET and get the BSIM3, BSIM4 or PSP modeling document and get the software like ICCAP, UTMOST III/IV, BSIMPRO and get their documentation along with the specific simulator model documentation. you are good to go.

If you just need device models to do circuit simulation for learning analog design than all the analog design book has the device model for hand calculation and circuit design/simulation as well.

Hope that help

metalgarri said:

Thank you. I studied on some books on analog IC design, mostly on Razavi and Baker, or device physics on Sze and Colinge, but they explain more on the physics of MOSFET and how to get to the equations for current than on the extraction of parameter for a given technology.
I have also the Gray-Mayer and Allen books, but I've never read that part.

Could be that this kind procedures are strictly related to the model itself?
I mean that, instead of searching for general ideas and concepts, I should take the mathematical formulation for the drain current, and try to find the way to process the acquired data of Id(Vds) and Id(Vgs) in order to extract the DC parameters, for example.

Does it make sense?

Click to expand...

For learning analog design, the models that are in all these books for a first approach could be ok.
On the other hand, my problem is that I am going to design analog circuits on a new technology that is not CMOS, and it is not even MOS actually, but the devices are still field effect devices.
What I was thinking in the beginning was to take a mos model, and to process the data from the measurements to extract the parameters, in order to have in the end something to do simulation with. I saw that some people do the same, fitting the parameters in a MOS level 3 model. But.....
Apparently this is a very bad choice when analog circuits have to be designed, because the parameters in the model have no physical meaning, and this could lead to totally different behaviour from simulation to real circuit.
This is a thing that I have not experienced yet. People with more experience than me suggested me, once I have the analytical model, to extract all the parameters and to put everything in a verilog-A file for simulation.
In the end my problem is more practical, and it is how to do a parameter extractor. The thing is that I don't know if there is a standard way to do it, or if I should make a parameter extractor myself...
Anyway thank you for your help

The quite accurate compact models for each FET devices are exists, You have to only find a proper articles about them in IEEE transaction on electron devices and/or in solid state electronics journals. The spice models are not good enough for submicron cmos so their are completely not appropriate for multigates, non-bulk etc nodes.