Hello everyone,
I am trying to design a starved current ring oscillator based with CMOS 0.35u having to emit 100MHz. I dont have much power limitation (meaning i can go up to several hundreds of uA) but I am using this oscillator as a part of a temperature and process independent design.
I have looked a lot of paper and publications about this subject and none of them explain their choice of W/L of both the inverters and currents mirrors. Also i have seen different types: mirror's W/L > inverters, inverters W/L > mirrors or even equal. I have the impression that everyone does it on an empiric way just by testing and do not actually explain why.
So I am asking, is there a rule about this design? What kind of values i need? it should probablly be related with 2 factors:
1- Parasit Capacity of the inverter
2- Current limitations
Thanks in advance