LEARNING2
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Hi everyone
I need to design FM MODULATOR BY USING PLL but without using any IC or Chip.
I need to build the circuit and examine it on the oscilloscope only.
thank you in advance for any help..
Maybe you can add modulate signal to the LooP filter's output , make sure that the bandwith of loop filter is less than one of modulate signal.
Carrier frequency?
Modulating signal... Sinusoidal? Maximum frequency?
Carrier deviation?
I think you agree on any answers for these main questions as long a simple circuit can be built and tested on a scope. :wink:
It's not clear, why you want to use a PLL. It's not necessarily needed for FM modulation. You basically need a kind of VCO, e.g. a LC oscillator with a varicap diode.
A PLL would require these additional components respectively building blocks:
- a reference oscillator
- a phase comparator
- a loop filter and amplifier
All these could be made without using ICs, but why?
I can certainly agree on the fact about using a PLL chip but considering you want to build a PLL. 1.) Go through with the design steps mentioned in **broken link removed**. (I couldn't explain it any better)
Considering you want FM modulation the old fashioned way: i) All you need is a VCO for Narrawband FM ii) Use a Hartley Osciallor
Converting Narrowband FM to Wideband : You need a Frequency multiplier and Local Oscillator with a BPF followed by a power amplifier going to the antenna.
Just verify in any case if you want FM demodulation using a PLL or Modulation. Because a PLL is "overkill" for modulation.
Are you proceeding to PLL chips now?how can i use the pll circuit in figure11 to generate fm signal just to be tested on oscilloscpe.
What's your inteded frequency range? Do you have any laboratory function or RF generators available to generate the modulation and carrier signal?
There's no principle difference in loop operation between a PLL using a frequency divider and a 1:1 frequency topology. Omitting the frequency divider has been suggested for a simplified experimental setup without using ICs. You'll find a number of technical PLL applications without frequency divider, by the way.Then the N.F_input is fed back through a frequency divider of "N" to the phase detector input. here the phase detector just keeps the input and output in phase.
The setup has been explained in post #7 and post#8 by KerimF and biff44. The idea is to set the lowpass cutoff frequency below the modulation frequency. RCinFLA has however mentioned a serious limitation of the low loop bandwidth in post #9.I quite dont get the summer block in it.
You would be however able to visualize the phase shift between carrier and VCO with a two-channel oscilloscope.
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