I am working on a 16:4 MUX that is comprised of four cascaded 4:1 MUXs. Each MUX has an active-low enable pin. To enable one MUX at a time, I need to use a counter that outputs the following:
Clock Cycle 1: 1110
Clock Cycle 2: 1101
Clock Cycle 3: 1011
Clock Cycle 4: 0111
In decimal, the clock is counting from 14 to 13 to 11 to 7 and then repeating.
I've generated a state diagram, a next-state table, a J-K FF transition table, the appropriate K-maps based on these tables, and finally a set of minimized SOP expressions from the K-maps. However, my output pins (Q0, Q1, Q2, and Q3) are all high all the time. I don't understand why.
**broken link removed**
My tables, K-Maps and SOP expressions are here: **broken link removed**