NIJINE
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HI,
i AM facing an problem in design vision like definition is: " The register GT is constant and will be removed..since i declared a signal and i initialized to some value to make it constant.so in Formality also its creating lot of unmatched ports..please help me..I want these constant values for some comparison purposes ....what to next??
i AM facing an problem in design vision like definition is: " The register GT is constant and will be removed..since i declared a signal and i initialized to some value to make it constant.so in Formality also its creating lot of unmatched ports..please help me..I want these constant values for some comparison purposes ....what to next??