bravo_echo_11
Newbie level 3
Hello,
I just got a strange question:
Is it possible to have complete design translation between Mentor Flow and Cadence Flow? I specifically mean by complete design everything: schematics, layout, simulation scripts, vhdl code, cells, ... just everything ...
I know there are some standard formats for Layouts and schematic which can be accepted and generated by both tools, but I am asking about a complete design(many schematics, layouts ...).
I want also to know, if the translation will be lossless. I mean without any loss of information? Will every detail be conserved or not?
Thanks a lot for your time.
bravo_echo_11
I just got a strange question:
Is it possible to have complete design translation between Mentor Flow and Cadence Flow? I specifically mean by complete design everything: schematics, layout, simulation scripts, vhdl code, cells, ... just everything ...
I know there are some standard formats for Layouts and schematic which can be accepted and generated by both tools, but I am asking about a complete design(many schematics, layouts ...).
I want also to know, if the translation will be lossless. I mean without any loss of information? Will every detail be conserved or not?
Thanks a lot for your time.
bravo_echo_11